The following patch improves code size for ARM. Before the patch
CSiBE size generated by GCC configured --with-arch=armv7-a
--with-fpu=vfpv3-d16 --with-float=hard (with -mthumb) was
2414926
After the patch the size is
2396798
For comparison, when the reload pass is used the size is
2400154
The change in arm.h is to prevent reloading sp as an address by LRA.
Reload has no such problem as it uses legitimate address hook and LRA
mostly relies on base_reg_class.
Richard, is this part ok to commit to the trunk?
The change in lra-constraints.c is for correct alternative choice in
move patterns when pseudo is of class of general reg and one alternative
contains lo regs and another one contains hi regs.
The patch was bootstrapped on x86/x86-64 and arm.
2014-02-07 Vladimir Makarov <vmaka...@redhat.com>
PR rtl-optimization/59535
* lra-constraints.c (process_alt_operands): Encourage alternative
when unassigned pseudo class is superset of the alternative class.
* config/arm/arm.h (MODE_BASE_REG_CLASS): Return CORE_REGS for
Thumb2 for LRA.
Index: lra-constraints.c
===================================================================
--- lra-constraints.c (revision 207562)
+++ lra-constraints.c (working copy)
@@ -2112,6 +2112,21 @@ process_alt_operands (int only_alternati
goto fail;
}
+ /* If not assigned pseudo has a class which a subset of
+ required reg class, it is a less costly alternative
+ as the pseudo stil can get a hard reg of necessary
+ class. */
+ if (! no_regs_p && REG_P (op) && hard_regno[nop] < 0
+ && (cl = get_reg_class (REGNO (op))) != NO_REGS
+ && ira_class_subset_p[this_alternative][cl])
+ {
+ if (lra_dump_file != NULL)
+ fprintf
+ (lra_dump_file,
+ " %d Super set class reg: reject-=3\n", nop);
+ reject -= 3;
+ }
+
this_alternative_offmemok = offmemok;
if (this_costly_alternative != NO_REGS)
{
Index: config/arm/arm.h
===================================================================
--- config/arm/arm.h (revision 207562)
+++ config/arm/arm.h (working copy)
@@ -1272,8 +1272,8 @@ enum reg_class
when addressing quantities in QI or HI mode; if we don't know the
mode, then we must be conservative. */
#define MODE_BASE_REG_CLASS(MODE) \
- (TARGET_ARM || (TARGET_THUMB2 && !optimize_size) ? CORE_REGS : \
- (((MODE) == SImode) ? BASE_REGS : LO_REGS))
+ (TARGET_ARM || (TARGET_THUMB2 && (!optimize_size || arm_lra_flag)) \
+ ? CORE_REGS : ((MODE) == SImode ? BASE_REGS : LO_REGS))
/* For Thumb we can not support SP+reg addressing, so we return LO_REGS
instead of BASE_REGS. */
