Hi,
Turns out that for Icc meaning of Yk and k constraints
(exposed through inline asm) is opposite to current GCC implementation.
As Icc with such behavior was already releases and GCC wasn't. I propose
to swap meaning of Yk and k constraints. Changes are pretty mechanical.
Bootstraps/passes make check/SPEC2006. Ok for trunk?
Here is ChangeLog:
2014-01-30 Ilya Tocar <ilya.to...@intel.com>
* config/i386/constraints.md (Yk): Swap meaning with k.
* config/i386/i386.md (movhi_internal): Change Yk to k.
(movqi_internal): Ditto.
(*k<logic><mode>): Ditto.
(*andhi_1): Ditto.
(*andqi_1): Ditto.
(kandn<mode>): Ditto.
(*<code>hi_1): Ditto.
(*<code>qi_1): Ditto.
(kxnor<mode>): Ditto.
(kortestzhi): Ditto.
(kortestchi): Ditto.
(kunpckhi): Ditto.
(*one_cmplhi2_1): Ditto.
(*one_cmplqi2_1): Ditto.
* config/i386/sse.md (): Change k to Yk.
(avx512f_load<mode>_mask): Ditto.
(avx512f_blendm<mode>): Ditto.
(avx512f_store<mode>_mask): Ditto.
(avx512f_storeu<ssemodesuffix>512_mask): Ditto.
(avx512f_storedqu<mode>_mask): Ditto.
(avx512f_cmp<mode>3<mask_scalar_merge_name><round_saeonly_name>): Ditto.
(avx512f_ucmp<mode>3<mask_scalar_merge_name>): Ditto.
(avx512f_vmcmp<mode>3<round_saeonly_name>): Ditto.
(avx512f_vmcmp<mode>3_mask<round_saeonly_name>): Ditto.
(avx512f_maskcmp<mode>3): Ditto.
(avx512f_fmadd_<mode>_mask<round_name>): Ditto.
(avx512f_fmadd_<mode>_mask3<round_name>): Ditto.
(avx512f_fmsub_<mode>_mask<round_name>): Ditto.
(avx512f_fmsub_<mode>_mask3<round_name>): Ditto.
(avx512f_fnmadd_<mode>_mask<round_name>): Ditto.
(avx512f_fnmadd_<mode>_mask3<round_name>): Ditto.
(avx512f_fnmsub_<mode>_mask<round_name>): Ditto.
(avx512f_fnmsub_<mode>_mask3<round_name>): Ditto.
(avx512f_fmaddsub_<mode>_mask<round_name>): Ditto.
(avx512f_fmaddsub_<mode>_mask3<round_name>): Ditto.
(avx512f_fmsubadd_<mode>_mask<round_name>): Ditto.
(avx512f_fmsubadd_<mode>_mask3<round_name>): Ditto.
(avx512f_vextract<shuffletype>32x4_1_maskm): Ditto.
(vec_extract_lo_<mode>_maskm): Ditto.
(vec_extract_hi_<mode>_maskm): Ditto.
(avx512f_vternlog<mode>_mask): Ditto.
(avx512f_fixupimm<mode>_mask<round_saeonly_name>): Ditto.
(avx512f_sfixupimm<mode>_mask<round_saeonly_name>): Ditto.
(avx512f_<code><pmov_src_lower><mode>2_mask): Ditto.
(avx512f_<code>v8div16qi2_mask): Ditto.
(avx512f_<code>v8div16qi2_mask_store): Ditto.
(avx512f_eq<mode>3<mask_scalar_merge_name>_1): Ditto.
(avx512f_gt<mode>3<mask_scalar_merge_name>): Ditto.
(avx512f_testm<mode>3<mask_scalar_merge_name>): Ditto.
(avx512f_testnm<mode>3<mask_scalar_merge_name>): Ditto.
(*avx512pf_gatherpf<mode>sf_mask): Ditto.
(*avx512pf_gatherpf<mode>df_mask): Ditto.
(*avx512pf_scatterpf<mode>sf_mask): Ditto.
(*avx512pf_scatterpf<mode>df_mask): Ditto.
(avx512cd_maskb_vec_dupv8di): Ditto.
(avx512cd_maskw_vec_dupv16si): Ditto.
(avx512f_vpermi2var<mode>3_maskz): Ditto.
(avx512f_vpermi2var<mode>3_mask): Ditto.
(avx512f_vpermi2var<mode>3_mask): Ditto.
(avx512f_vpermt2var<mode>3_maskz): Ditto.
(*avx512f_gathersi<mode>): Ditto.
(*avx512f_gathersi<mode>_2): Ditto.
(*avx512f_gatherdi<mode>): Ditto.
(*avx512f_gatherdi<mode>_2): Ditto.
(*avx512f_scattersi<mode>): Ditto.
(*avx512f_scatterdi<mode>): Ditto.
(avx512f_compress<mode>_mask): Ditto.
(avx512f_compressstore<mode>_mask): Ditto.
(avx512f_expand<mode>_mask): Ditto.
* config/i386/subst.md (mask): Change k to Yk.
(mask_scalar_merge): Ditto.
(sd): Ditto.
And for tests:
2014-01-30 Ilya Tocar <ilya.to...@intel.com>
* gcc.target/i386/avx512f-inline-asm.c: Swap Yk and k.
* gcc.target/i386/avx512f-kmovw-1.c: Also allow k0.
Patch bellow:
---
gcc/config/i386/constraints.md | 4 +-
gcc/config/i386/i386.md | 72 +++++++-------
gcc/config/i386/sse.md | 110 ++++++++++-----------
gcc/config/i386/subst.md | 6 +-
gcc/testsuite/gcc.target/i386/avx512f-inline-asm.c | 6 +-
gcc/testsuite/gcc.target/i386/avx512f-kmovw-1.c | 2 +-
6 files changed, 100 insertions(+), 100 deletions(-)
diff --git a/gcc/config/i386/constraints.md b/gcc/config/i386/constraints.md
index 0d61c87..65335f1 100644
--- a/gcc/config/i386/constraints.md
+++ b/gcc/config/i386/constraints.md
@@ -78,10 +78,10 @@
"TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 ? FP_SECOND_REG : NO_REGS"
"Second from top of 80387 floating-point stack (@code{%st(1)}).")
-(define_register_constraint "k" "TARGET_AVX512F ? MASK_EVEX_REGS : NO_REGS"
+(define_register_constraint "Yk" "TARGET_AVX512F ? MASK_EVEX_REGS : NO_REGS"
"@internal Any mask register that can be used as predicate, i.e. k1-k7.")
-(define_register_constraint "Yk" "TARGET_AVX512F ? MASK_REGS : NO_REGS"
+(define_register_constraint "k" "TARGET_AVX512F ? MASK_REGS : NO_REGS"
"@internal Any mask register.")
;; Vector registers (also used for plain floating point nowadays).
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 92e8fd0..7c53e4d 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -2306,8 +2306,8 @@
(define_insn "*movhi_internal"
- [(set (match_operand:HI 0 "nonimmediate_operand" "=r,r ,r ,m ,Yk,Yk,rm")
- (match_operand:HI 1 "general_operand" "r ,rn,rm,rn,rm,Yk,Yk"))]
+ [(set (match_operand:HI 0 "nonimmediate_operand" "=r,r ,r ,m ,k,k,rm")
+ (match_operand:HI 1 "general_operand" "r ,rn,rm,rn,rm,k,k"))]
"!(MEM_P (operands[0]) && MEM_P (operands[1]))"
{
switch (get_attr_type (insn))
@@ -2380,9 +2380,9 @@
(define_insn "*movqi_internal"
[(set (match_operand:QI 0 "nonimmediate_operand"
- "=q,q ,q ,r,r ,?r,m ,Yk,Yk,r")
+ "=q,q ,q ,r,r ,?r,m ,k,k,r")
(match_operand:QI 1 "general_operand"
- "q ,qn,qm,q,rn,qm,qn,r ,Yk,Yk"))]
+ "q ,qn,qm,q,rn,qm,qn,r ,k,k"))]
"!(MEM_P (operands[0]) && MEM_P (operands[1]))"
{
switch (get_attr_type (insn))
@@ -7815,9 +7815,9 @@
(match_dup 2)))])
(define_insn "*k<logic><mode>"
- [(set (match_operand:SWI12 0 "mask_reg_operand" "=Yk")
- (any_logic:SWI12 (match_operand:SWI12 1 "mask_reg_operand" "Yk")
- (match_operand:SWI12 2 "mask_reg_operand" "Yk")))]
+ [(set (match_operand:SWI12 0 "mask_reg_operand" "=k")
+ (any_logic:SWI12 (match_operand:SWI12 1 "mask_reg_operand" "k")
+ (match_operand:SWI12 2 "mask_reg_operand" "k")))]
"TARGET_AVX512F"
"k<logic>w\t{%2, %1, %0|%0, %1, %2}";
[(set_attr "mode" "<MODE>")
@@ -7947,9 +7947,9 @@
(set_attr "mode" "SI")])
(define_insn "*andhi_1"
- [(set (match_operand:HI 0 "nonimmediate_operand" "=rm,r,Ya,!Yk")
- (and:HI (match_operand:HI 1 "nonimmediate_operand" "%0,0,qm,Yk")
- (match_operand:HI 2 "general_operand" "rn,rm,L,Yk")))
+ [(set (match_operand:HI 0 "nonimmediate_operand" "=rm,r,Ya,!k")
+ (and:HI (match_operand:HI 1 "nonimmediate_operand" "%0,0,qm,k")
+ (match_operand:HI 2 "general_operand" "rn,rm,L,k")))
(clobber (reg:CC FLAGS_REG))]
"ix86_binary_operator_ok (AND, HImode, operands)"
{
@@ -7978,9 +7978,9 @@
;; %%% Potential partial reg stall on alternative 2. What to do?
(define_insn "*andqi_1"
- [(set (match_operand:QI 0 "nonimmediate_operand" "=qm,q,r,!Yk")
- (and:QI (match_operand:QI 1 "nonimmediate_operand" "%0,0,0,Yk")
- (match_operand:QI 2 "general_operand" "qn,qmn,rn,Yk")))
+ [(set (match_operand:QI 0 "nonimmediate_operand" "=qm,q,r,!k")
+ (and:QI (match_operand:QI 1 "nonimmediate_operand" "%0,0,0,k")
+ (match_operand:QI 2 "general_operand" "qn,qmn,rn,k")))
(clobber (reg:CC FLAGS_REG))]
"ix86_binary_operator_ok (AND, QImode, operands)"
"@
@@ -8003,11 +8003,11 @@
(set_attr "mode" "QI")])
(define_insn "kandn<mode>"
- [(set (match_operand:SWI12 0 "register_operand" "=r,&r,!Yk")
+ [(set (match_operand:SWI12 0 "register_operand" "=r,&r,!k")
(and:SWI12
(not:SWI12
- (match_operand:SWI12 1 "register_operand" "r,0,Yk"))
- (match_operand:SWI12 2 "register_operand" "r,r,Yk")))
+ (match_operand:SWI12 1 "register_operand" "r,0,k"))
+ (match_operand:SWI12 2 "register_operand" "r,r,k")))
(clobber (reg:CC FLAGS_REG))]
"TARGET_AVX512F"
"@
@@ -8388,10 +8388,10 @@
(set_attr "mode" "<MODE>")])
(define_insn "*<code>hi_1"
- [(set (match_operand:HI 0 "nonimmediate_operand" "=r,rm,!Yk")
+ [(set (match_operand:HI 0 "nonimmediate_operand" "=r,rm,!k")
(any_or:HI
- (match_operand:HI 1 "nonimmediate_operand" "%0,0,Yk")
- (match_operand:HI 2 "general_operand" "<g>,r<i>,Yk")))
+ (match_operand:HI 1 "nonimmediate_operand" "%0,0,k")
+ (match_operand:HI 2 "general_operand" "<g>,r<i>,k")))
(clobber (reg:CC FLAGS_REG))]
"ix86_binary_operator_ok (<CODE>, HImode, operands)"
"@
@@ -8403,9 +8403,9 @@
;; %%% Potential partial reg stall on alternative 2. What to do?
(define_insn "*<code>qi_1"
- [(set (match_operand:QI 0 "nonimmediate_operand" "=q,m,r,!Yk")
- (any_or:QI (match_operand:QI 1 "nonimmediate_operand" "%0,0,0,Yk")
- (match_operand:QI 2 "general_operand" "qmn,qn,rn,Yk")))
+ [(set (match_operand:QI 0 "nonimmediate_operand" "=q,m,r,!k")
+ (any_or:QI (match_operand:QI 1 "nonimmediate_operand" "%0,0,0,k")
+ (match_operand:QI 2 "general_operand" "qmn,qn,rn,k")))
(clobber (reg:CC FLAGS_REG))]
"ix86_binary_operator_ok (<CODE>, QImode, operands)"
"@
@@ -8465,11 +8465,11 @@
(set_attr "mode" "<MODE>")])
(define_insn "kxnor<mode>"
- [(set (match_operand:SWI12 0 "register_operand" "=r,!Yk")
+ [(set (match_operand:SWI12 0 "register_operand" "=r,!k")
(not:SWI12
(xor:SWI12
- (match_operand:SWI12 1 "register_operand" "0,Yk")
- (match_operand:SWI12 2 "register_operand" "r,Yk"))))
+ (match_operand:SWI12 1 "register_operand" "0,k")
+ (match_operand:SWI12 2 "register_operand" "r,k"))))
(clobber (reg:CC FLAGS_REG))]
"TARGET_AVX512F"
"@
@@ -8498,8 +8498,8 @@
[(set (reg:CCZ FLAGS_REG)
(compare:CCZ
(ior:HI
- (match_operand:HI 0 "register_operand" "Yk")
- (match_operand:HI 1 "register_operand" "Yk"))
+ (match_operand:HI 0 "register_operand" "k")
+ (match_operand:HI 1 "register_operand" "k"))
(const_int 0)))]
"TARGET_AVX512F && ix86_match_ccmode (insn, CCZmode)"
"kortestw\t{%1, %0|%0, %1}"
@@ -8511,8 +8511,8 @@
[(set (reg:CCC FLAGS_REG)
(compare:CCC
(ior:HI
- (match_operand:HI 0 "register_operand" "Yk")
- (match_operand:HI 1 "register_operand" "Yk"))
+ (match_operand:HI 0 "register_operand" "k")
+ (match_operand:HI 1 "register_operand" "k"))
(const_int -1)))]
"TARGET_AVX512F && ix86_match_ccmode (insn, CCCmode)"
"kortestw\t{%1, %0|%0, %1}"
@@ -8521,12 +8521,12 @@
(set_attr "prefix" "vex")])
(define_insn "kunpckhi"
- [(set (match_operand:HI 0 "register_operand" "=Yk")
+ [(set (match_operand:HI 0 "register_operand" "=k")
(ior:HI
(ashift:HI
- (match_operand:HI 1 "register_operand" "Yk")
+ (match_operand:HI 1 "register_operand" "k")
(const_int 8))
- (zero_extend:HI (match_operand:QI 2 "register_operand" "Yk"))))]
+ (zero_extend:HI (match_operand:QI 2 "register_operand" "k"))))]
"TARGET_AVX512F"
"kunpckbw\t{%2, %1, %0|%0, %1, %2}"
[(set_attr "mode" "HI")
@@ -9140,8 +9140,8 @@
(set_attr "mode" "<MODE>")])
(define_insn "*one_cmplhi2_1"
- [(set (match_operand:HI 0 "nonimmediate_operand" "=rm,!Yk")
- (not:HI (match_operand:HI 1 "nonimmediate_operand" "0,Yk")))]
+ [(set (match_operand:HI 0 "nonimmediate_operand" "=rm,!k")
+ (not:HI (match_operand:HI 1 "nonimmediate_operand" "0,k")))]
"ix86_unary_operator_ok (NOT, HImode, operands)"
"@
not{w}\t%0
@@ -9153,8 +9153,8 @@
;; %%% Potential partial reg stall on alternative 1. What to do?
(define_insn "*one_cmplqi2_1"
- [(set (match_operand:QI 0 "nonimmediate_operand" "=qm,r,!Yk")
- (not:QI (match_operand:QI 1 "nonimmediate_operand" "0,0,Yk")))]
+ [(set (match_operand:QI 0 "nonimmediate_operand" "=qm,r,!k")
+ (not:QI (match_operand:QI 1 "nonimmediate_operand" "0,0,k")))]
"ix86_unary_operator_ok (NOT, QImode, operands)"
"@
not{b}\t%0
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index ac0582f..cbebd87 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -781,7 +781,7 @@
(vec_merge:VI48F_512
(match_operand:VI48F_512 1 "nonimmediate_operand" "v,m")
(match_operand:VI48F_512 2 "vector_move_operand" "0C,0C")
- (match_operand:<avx512fmaskmode> 3 "register_operand" "k,k")))]
+ (match_operand:<avx512fmaskmode> 3 "register_operand" "Yk,Yk")))]
"TARGET_AVX512F"
{
switch (MODE_<sseinsnmode>)
@@ -807,7 +807,7 @@
(vec_merge:VI48F_512
(match_operand:VI48F_512 2 "nonimmediate_operand" "vm")
(match_operand:VI48F_512 1 "register_operand" "v")
- (match_operand:<avx512fmaskmode> 3 "register_operand" "k")))]
+ (match_operand:<avx512fmaskmode> 3 "register_operand" "Yk")))]
"TARGET_AVX512F"
"v<sseintprefix>blendm<ssemodesuffix>\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}"
[(set_attr "type" "ssemov")
@@ -819,7 +819,7 @@
(vec_merge:VI48F_512
(match_operand:VI48F_512 1 "register_operand" "v")
(match_dup 0)
- (match_operand:<avx512fmaskmode> 2 "register_operand" "k")))]
+ (match_operand:<avx512fmaskmode> 2 "register_operand" "Yk")))]
"TARGET_AVX512F"
{
switch (MODE_<sseinsnmode>)
@@ -1025,7 +1025,7 @@
[(match_operand:VF_512 1 "register_operand" "v")]
UNSPEC_STOREU)
(match_dup 0)
- (match_operand:<avx512fmaskmode> 2 "register_operand" "k")))]
+ (match_operand:<avx512fmaskmode> 2 "register_operand" "Yk")))]
"TARGET_AVX512F"
{
switch (get_attr_mode (insn))
@@ -1157,7 +1157,7 @@
[(match_operand:VI48_512 1 "register_operand" "v")]
UNSPEC_STOREU)
(match_dup 0)
- (match_operand:<avx512fmaskmode> 2 "register_operand" "k")))]
+ (match_operand:<avx512fmaskmode> 2 "register_operand" "Yk")))]
"TARGET_AVX512F"
{
if (<MODE>mode == V8DImode)
@@ -2169,7 +2169,7 @@
(V16SI "const_0_to_7_operand") (V8DI "const_0_to_7_operand")])
(define_insn "avx512f_cmp<mode>3<mask_scalar_merge_name><round_saeonly_name>"
- [(set (match_operand:<avx512fmaskmode> 0 "register_operand" "=k")
+ [(set (match_operand:<avx512fmaskmode> 0 "register_operand" "=Yk")
(unspec:<avx512fmaskmode>
[(match_operand:VI48F_512 1 "register_operand" "v")
(match_operand:VI48F_512 2 "<round_saeonly_nimm_predicate>"
"<round_saeonly_constraint>")
@@ -2183,7 +2183,7 @@
(set_attr "mode" "<sseinsnmode>")])
(define_insn "avx512f_ucmp<mode>3<mask_scalar_merge_name>"
- [(set (match_operand:<avx512fmaskmode> 0 "register_operand" "=k")
+ [(set (match_operand:<avx512fmaskmode> 0 "register_operand" "=Yk")
(unspec:<avx512fmaskmode>
[(match_operand:VI48_512 1 "register_operand" "v")
(match_operand:VI48_512 2 "nonimmediate_operand" "vm")
@@ -2197,7 +2197,7 @@
(set_attr "mode" "<sseinsnmode>")])
(define_insn "avx512f_vmcmp<mode>3<round_saeonly_name>"
- [(set (match_operand:<avx512fmaskmode> 0 "register_operand" "=k")
+ [(set (match_operand:<avx512fmaskmode> 0 "register_operand" "=Yk")
(and:<avx512fmaskmode>
(unspec:<avx512fmaskmode>
[(match_operand:VF_128 1 "register_operand" "v")
@@ -2213,7 +2213,7 @@
(set_attr "mode" "<ssescalarmode>")])
(define_insn "avx512f_vmcmp<mode>3_mask<round_saeonly_name>"
- [(set (match_operand:<avx512fmaskmode> 0 "register_operand" "=k")
+ [(set (match_operand:<avx512fmaskmode> 0 "register_operand" "=Yk")
(and:<avx512fmaskmode>
(unspec:<avx512fmaskmode>
[(match_operand:VF_128 1 "register_operand" "v")
@@ -2221,7 +2221,7 @@
(match_operand:SI 3 "const_0_to_31_operand" "n")]
UNSPEC_PCMP)
(and:<avx512fmaskmode>
- (match_operand:<avx512fmaskmode> 4 "register_operand" "k")
+ (match_operand:<avx512fmaskmode> 4 "register_operand" "Yk")
(const_int 1))))]
"TARGET_AVX512F"
"vcmp<ssescalarmodesuffix>\t{%3, <round_saeonly_op5>%2, %1,
%0%{%4%}|%0%{%4%}, %1, %2<round_saeonly_op5>, %3}"
@@ -2231,7 +2231,7 @@
(set_attr "mode" "<ssescalarmode>")])
(define_insn "avx512f_maskcmp<mode>3"
- [(set (match_operand:<avx512fmaskmode> 0 "register_operand" "=k")
+ [(set (match_operand:<avx512fmaskmode> 0 "register_operand" "=Yk")
(match_operator:<avx512fmaskmode> 3 "sse_comparison_operator"
[(match_operand:VF 1 "register_operand" "v")
(match_operand:VF 2 "nonimmediate_operand" "vm")]))]
@@ -2806,7 +2806,7 @@
(match_operand:VF_512 2 "<round_nimm_predicate>"
"<round_constraint>,v")
(match_operand:VF_512 3 "<round_nimm_predicate>"
"v,<round_constraint>"))
(match_dup 1)
- (match_operand:<avx512fmaskmode> 4 "register_operand" "k,k")))]
+ (match_operand:<avx512fmaskmode> 4 "register_operand" "Yk,Yk")))]
"TARGET_AVX512F"
"@
vfmadd132<ssemodesuffix>\t{<round_op5>%2, %3, %0%{%4%}|%0%{%4%}, %3,
%2<round_op5>}
@@ -2823,7 +2823,7 @@
(match_operand:VF_512 2 "<round_nimm_predicate>"
"<round_constraint>")
(match_operand:VF_512 3 "register_operand" "0"))
(match_dup 3)
- (match_operand:<avx512fmaskmode> 4 "register_operand" "k")))]
+ (match_operand:<avx512fmaskmode> 4 "register_operand" "Yk")))]
"TARGET_AVX512F"
"vfmadd231<ssemodesuffix>\t{<round_op5>%2, %1, %0%{%4%}|%0%{%4%}, %1,
%2<round_op5>}"
[(set_attr "isa" "fma_avx512f")
@@ -2857,7 +2857,7 @@
(neg:VF_512
(match_operand:VF_512 3 "<round_nimm_predicate>"
"v,<round_constraint>")))
(match_dup 1)
- (match_operand:<avx512fmaskmode> 4 "register_operand" "k,k")))]
+ (match_operand:<avx512fmaskmode> 4 "register_operand" "Yk,Yk")))]
"TARGET_AVX512F"
"@
vfmsub132<ssemodesuffix>\t{<round_op5>%2, %3, %0%{%4%}|%0%{%4%}, %3,
%2<round_op5>}
@@ -2875,7 +2875,7 @@
(neg:VF_512
(match_operand:VF_512 3 "register_operand" "0")))
(match_dup 3)
- (match_operand:<avx512fmaskmode> 4 "register_operand" "k")))]
+ (match_operand:<avx512fmaskmode> 4 "register_operand" "Yk")))]
"TARGET_AVX512F"
"vfmsub231<ssemodesuffix>\t{<round_op5>%2, %1, %0%{%4%}|%0%{%4%}, %1,
%2<round_op5>}"
[(set_attr "isa" "fma_avx512f")
@@ -2909,7 +2909,7 @@
(match_operand:VF_512 2 "<round_nimm_predicate>"
"<round_constraint>,v")
(match_operand:VF_512 3 "<round_nimm_predicate>"
"v,<round_constraint>"))
(match_dup 1)
- (match_operand:<avx512fmaskmode> 4 "register_operand" "k,k")))]
+ (match_operand:<avx512fmaskmode> 4 "register_operand" "Yk,Yk")))]
"TARGET_AVX512F"
"@
vfnmadd132<ssemodesuffix>\t{<round_op5>%2, %3, %0%{%4%}|%0%{%4%}, %3,
%2<round_op5>}
@@ -2927,7 +2927,7 @@
(match_operand:VF_512 2 "<round_nimm_predicate>"
"<round_constraint>")
(match_operand:VF_512 3 "register_operand" "0"))
(match_dup 3)
- (match_operand:<avx512fmaskmode> 4 "register_operand" "k")))]
+ (match_operand:<avx512fmaskmode> 4 "register_operand" "Yk")))]
"TARGET_AVX512F"
"vfnmadd231<ssemodesuffix>\t{<round_op5>%2, %1, %0%{%4%}|%0%{%4%}, %1,
%2<round_op5>}"
[(set_attr "isa" "fma_avx512f")
@@ -2963,7 +2963,7 @@
(neg:VF_512
(match_operand:VF_512 3 "<round_nimm_predicate>"
"v,<round_constraint>")))
(match_dup 1)
- (match_operand:<avx512fmaskmode> 4 "register_operand" "k,k")))]
+ (match_operand:<avx512fmaskmode> 4 "register_operand" "Yk,Yk")))]
"TARGET_AVX512F"
"@
vfnmsub132<ssemodesuffix>\t{<round_op5>%2, %3, %0%{%4%}|%0%{%4%}, %3,
%2<round_op5>}
@@ -2982,7 +2982,7 @@
(neg:VF_512
(match_operand:VF_512 3 "register_operand" "0")))
(match_dup 3)
- (match_operand:<avx512fmaskmode> 4 "register_operand" "k")))]
+ (match_operand:<avx512fmaskmode> 4 "register_operand" "Yk")))]
"TARGET_AVX512F"
"vfnmsub231<ssemodesuffix>\t{<round_op5>%2, %1, %0%{%4%}|%0%{%4%}, %1,
%2<round_op5>}"
[(set_attr "isa" "fma_avx512f")
@@ -3050,7 +3050,7 @@
(match_operand:VF_512 3 "<round_nimm_predicate>"
"v,<round_constraint>")]
UNSPEC_FMADDSUB)
(match_dup 1)
- (match_operand:<avx512fmaskmode> 4 "register_operand" "k,k")))]
+ (match_operand:<avx512fmaskmode> 4 "register_operand" "Yk,Yk")))]
"TARGET_AVX512F"
"@
vfmaddsub132<ssemodesuffix>\t{<round_op5>%2, %3, %0%{%4%}|%0%{%4%}, %3,
%2<round_op5>}
@@ -3068,7 +3068,7 @@
(match_operand:VF_512 3 "register_operand" "0")]
UNSPEC_FMADDSUB)
(match_dup 3)
- (match_operand:<avx512fmaskmode> 4 "register_operand" "k")))]
+ (match_operand:<avx512fmaskmode> 4 "register_operand" "Yk")))]
"TARGET_AVX512F"
"vfmaddsub231<ssemodesuffix>\t{<round_op5>%2, %1, %0%{%4%}|%0%{%4%}, %1,
%2<round_op5>}"
[(set_attr "isa" "fma_avx512f")
@@ -3104,7 +3104,7 @@
(match_operand:VF_512 3 "<round_nimm_predicate>"
"v,<round_constraint>"))]
UNSPEC_FMADDSUB)
(match_dup 1)
- (match_operand:<avx512fmaskmode> 4 "register_operand" "k,k")))]
+ (match_operand:<avx512fmaskmode> 4 "register_operand" "Yk,Yk")))]
"TARGET_AVX512F"
"@
vfmsubadd132<ssemodesuffix>\t{<round_op5>%2, %3, %0%{%4%}|%0%{%4%}, %3,
%2<round_op5>}
@@ -3123,7 +3123,7 @@
(match_operand:VF_512 3 "register_operand" "0"))]
UNSPEC_FMADDSUB)
(match_dup 3)
- (match_operand:<avx512fmaskmode> 4 "register_operand" "k")))]
+ (match_operand:<avx512fmaskmode> 4 "register_operand" "Yk")))]
"TARGET_AVX512F"
"vfmsubadd231<ssemodesuffix>\t{<round_op5>%2, %1, %0%{%4%}|%0%{%4%}, %1,
%2<round_op5>}"
[(set_attr "isa" "fma_avx512f")
@@ -5795,7 +5795,7 @@
(match_operand 4 "const_0_to_15_operand")
(match_operand 5 "const_0_to_15_operand")]))
(match_operand:<ssequartermode> 6 "memory_operand" "0")
- (match_operand:QI 7 "register_operand" "k")))]
+ (match_operand:QI 7 "register_operand" "Yk")))]
"TARGET_AVX512F && (INTVAL (operands[2]) = INTVAL (operands[3]) - 1)
&& (INTVAL (operands[3]) = INTVAL (operands[4]) - 1)
&& (INTVAL (operands[4]) = INTVAL (operands[5]) - 1)"
@@ -5891,7 +5891,7 @@
(parallel [(const_int 0) (const_int 1)
(const_int 2) (const_int 3)]))
(match_operand:<ssehalfvecmode> 2 "memory_operand" "0")
- (match_operand:QI 3 "register_operand" "k")))]
+ (match_operand:QI 3 "register_operand" "Yk")))]
"TARGET_AVX512F"
"vextract<shuffletype>64x4\t{$0x0, %1, %0%{%3%}|%0%{%3%}, %1, 0x0}"
[(set_attr "type" "sselog")
@@ -5931,7 +5931,7 @@
(parallel [(const_int 4) (const_int 5)
(const_int 6) (const_int 7)]))
(match_operand:<ssehalfvecmode> 2 "memory_operand" "0")
- (match_operand:QI 3 "register_operand" "k")))]
+ (match_operand:QI 3 "register_operand" "Yk")))]
"TARGET_AVX512F"
"vextract<shuffletype>64x4\t{$0x1, %1, %0%{%3%}|%0%{%3%}, %1, 0x1}"
[(set_attr "type" "sselog")
@@ -6630,7 +6630,7 @@
(match_operand:SI 4 "const_0_to_255_operand")]
UNSPEC_VTERNLOG)
(match_dup 1)
- (match_operand:<avx512fmaskmode> 5 "register_operand" "k")))]
+ (match_operand:<avx512fmaskmode> 5 "register_operand" "Yk")))]
"TARGET_AVX512F"
"vpternlog<ssemodesuffix>\t{%4, %3, %2, %0%{%5%}|%0%{%5%}, %2, %3, %4}"
[(set_attr "type" "sselog")
@@ -6742,7 +6742,7 @@
(match_operand:SI 4 "const_0_to_255_operand")]
UNSPEC_FIXUPIMM)
(match_dup 1)
- (match_operand:<avx512fmaskmode> 5 "register_operand" "k")))]
+ (match_operand:<avx512fmaskmode> 5 "register_operand" "Yk")))]
"TARGET_AVX512F"
"vfixupimm<ssemodesuffix>\t{%4, <round_saeonly_op6>%3, %2,
%0%{%5%}|%0%{%5%}, %2, %3<round_saeonly_op6>, %4}";
[(set_attr "prefix" "evex")
@@ -6793,7 +6793,7 @@
(match_dup 1)
(const_int 1))
(match_dup 1)
- (match_operand:<avx512fmaskmode> 5 "register_operand" "k")))]
+ (match_operand:<avx512fmaskmode> 5 "register_operand" "Yk")))]
"TARGET_AVX512F"
"vfixupimm<ssescalarmodesuffix>\t{%4, <round_saeonly_op6>%3, %2,
%0%{%5%}|%0%{%5%}, %2, %3<round_saeonly_op6>, %4}";
[(set_attr "prefix" "evex")
@@ -7450,7 +7450,7 @@
(any_truncate:PMOV_DST_MODE
(match_operand:<pmov_src_mode> 1 "register_operand" "v,v"))
(match_operand:PMOV_DST_MODE 2 "vector_move_operand" "0C,0")
- (match_operand:<avx512fmaskmode> 3 "register_operand" "k,k")))]
+ (match_operand:<avx512fmaskmode> 3 "register_operand" "Yk,Yk")))]
"TARGET_AVX512F"
"vpmov<trunsuffix><pmov_suff>\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}"
[(set_attr "type" "ssemov")
@@ -7512,7 +7512,7 @@
(const_int 2) (const_int 3)
(const_int 4) (const_int 5)
(const_int 6) (const_int 7)]))
- (match_operand:QI 3 "register_operand" "k"))
+ (match_operand:QI 3 "register_operand" "Yk"))
(const_vector:V8QI [(const_int 0) (const_int 0)
(const_int 0) (const_int 0)
(const_int 0) (const_int 0)
@@ -7535,7 +7535,7 @@
(const_int 2) (const_int 3)
(const_int 4) (const_int 5)
(const_int 6) (const_int 7)]))
- (match_operand:QI 2 "register_operand" "k"))
+ (match_operand:QI 2 "register_operand" "Yk"))
(vec_select:V8QI
(match_dup 0)
(parallel [(const_int 8) (const_int 9)
@@ -8575,7 +8575,7 @@
"ix86_fixup_binary_operands_no_copy (EQ, <MODE>mode, operands);")
(define_insn "avx512f_eq<mode>3<mask_scalar_merge_name>_1"
- [(set (match_operand:<avx512fmaskmode> 0 "register_operand" "=k")
+ [(set (match_operand:<avx512fmaskmode> 0 "register_operand" "=Yk")
(unspec:<avx512fmaskmode>
[(match_operand:VI48_512 1 "register_operand" "%v")
(match_operand:VI48_512 2 "nonimmediate_operand" "vm")]
@@ -8662,7 +8662,7 @@
(set_attr "mode" "OI")])
(define_insn "avx512f_gt<mode>3<mask_scalar_merge_name>"
- [(set (match_operand:<avx512fmaskmode> 0 "register_operand" "=k")
+ [(set (match_operand:<avx512fmaskmode> 0 "register_operand" "=Yk")
(unspec:<avx512fmaskmode>
[(match_operand:VI48_512 1 "register_operand" "v")
(match_operand:VI48_512 2 "nonimmediate_operand" "vm")]
UNSPEC_MASKED_GT))]
@@ -9065,7 +9065,7 @@
(const_string "<sseinsnmode>")))])
(define_insn "avx512f_testm<mode>3<mask_scalar_merge_name>"
- [(set (match_operand:<avx512fmaskmode> 0 "register_operand" "=k")
+ [(set (match_operand:<avx512fmaskmode> 0 "register_operand" "=Yk")
(unspec:<avx512fmaskmode>
[(match_operand:VI48_512 1 "register_operand" "v")
(match_operand:VI48_512 2 "nonimmediate_operand" "vm")]
@@ -9076,7 +9076,7 @@
(set_attr "mode" "<sseinsnmode>")])
(define_insn "avx512f_testnm<mode>3<mask_scalar_merge_name>"
- [(set (match_operand:<avx512fmaskmode> 0 "register_operand" "=k")
+ [(set (match_operand:<avx512fmaskmode> 0 "register_operand" "=Yk")
(unspec:<avx512fmaskmode>
[(match_operand:VI48_512 1 "register_operand" "v")
(match_operand:VI48_512 2 "nonimmediate_operand" "vm")]
@@ -12529,7 +12529,7 @@
(define_insn "*avx512pf_gatherpf<mode>sf_mask"
[(unspec
- [(match_operand:<avx512fmaskmode> 0 "register_operand" "k")
+ [(match_operand:<avx512fmaskmode> 0 "register_operand" "Yk")
(match_operator:<GATHER_SCATTER_SF_MEM_MODE> 5 "vsib_mem_operator"
[(unspec:P
[(match_operand:P 2 "vsib_address_operand" "Tv")
@@ -12601,7 +12601,7 @@
(define_insn "*avx512pf_gatherpf<mode>df_mask"
[(unspec
- [(match_operand:<avx512fmaskmode> 0 "register_operand" "k")
+ [(match_operand:<avx512fmaskmode> 0 "register_operand" "Yk")
(match_operator:V8DF 5 "vsib_mem_operator"
[(unspec:P
[(match_operand:P 2 "vsib_address_operand" "Tv")
@@ -12673,7 +12673,7 @@
(define_insn "*avx512pf_scatterpf<mode>sf_mask"
[(unspec
- [(match_operand:<avx512fmaskmode> 0 "register_operand" "k")
+ [(match_operand:<avx512fmaskmode> 0 "register_operand" "Yk")
(match_operator:<GATHER_SCATTER_SF_MEM_MODE> 5 "vsib_mem_operator"
[(unspec:P
[(match_operand:P 2 "vsib_address_operand" "Tv")
@@ -12745,7 +12745,7 @@
(define_insn "*avx512pf_scatterpf<mode>df_mask"
[(unspec
- [(match_operand:<avx512fmaskmode> 0 "register_operand" "k")
+ [(match_operand:<avx512fmaskmode> 0 "register_operand" "Yk")
(match_operator:V8DF 5 "vsib_mem_operator"
[(unspec:P
[(match_operand:P 2 "vsib_address_operand" "Tv")
@@ -14108,7 +14108,7 @@
[(set (match_operand:V8DI 0 "register_operand" "=v")
(vec_duplicate:V8DI
(zero_extend:DI
- (match_operand:QI 1 "register_operand" "k"))))]
+ (match_operand:QI 1 "register_operand" "Yk"))))]
"TARGET_AVX512CD"
"vpbroadcastmb2q\t{%1, %0|%0, %1}"
[(set_attr "type" "mskmov")
@@ -14119,7 +14119,7 @@
[(set (match_operand:V16SI 0 "register_operand" "=v")
(vec_duplicate:V16SI
(zero_extend:SI
- (match_operand:HI 1 "register_operand" "k"))))]
+ (match_operand:HI 1 "register_operand" "Yk"))))]
"TARGET_AVX512CD"
"vpbroadcastmw2d\t{%1, %0|%0, %1}"
[(set_attr "type" "mskmov")
@@ -14282,7 +14282,7 @@
(match_operand:VI48F_512 1 "register_operand" "v")
(match_operand:<sseintvecmode> 2 "register_operand" "0")
(match_operand:VI48F_512 3 "nonimmediate_operand" "vm")
- (match_operand:<avx512fmaskmode> 4 "register_operand" "k")]
+ (match_operand:<avx512fmaskmode> 4 "register_operand" "Yk")]
"TARGET_AVX512F"
{
emit_insn (gen_avx512f_vpermi2var<mode>3_maskz_1 (
@@ -14313,7 +14313,7 @@
(match_operand:VI48F_512 3 "nonimmediate_operand" "vm")]
UNSPEC_VPERMI2_MASK)
(match_dup 0)
- (match_operand:<avx512fmaskmode> 4 "register_operand" "k")))]
+ (match_operand:<avx512fmaskmode> 4 "register_operand" "Yk")))]
"TARGET_AVX512F"
"vpermi2<ssemodesuffix>\t{%3, %1, %0%{%4%}|%0%{%4%}, %1, %3}"
[(set_attr "type" "sselog")
@@ -14325,7 +14325,7 @@
(match_operand:<sseintvecmode> 1 "register_operand" "v")
(match_operand:VI48F_512 2 "register_operand" "0")
(match_operand:VI48F_512 3 "nonimmediate_operand" "vm")
- (match_operand:<avx512fmaskmode> 4 "register_operand" "k")]
+ (match_operand:<avx512fmaskmode> 4 "register_operand" "Yk")]
"TARGET_AVX512F"
{
emit_insn (gen_avx512f_vpermt2var<mode>3_maskz_1 (
@@ -14356,7 +14356,7 @@
(match_operand:VI48F_512 3 "nonimmediate_operand" "vm")]
UNSPEC_VPERMT2)
(match_dup 2)
- (match_operand:<avx512fmaskmode> 4 "register_operand" "k")))]
+ (match_operand:<avx512fmaskmode> 4 "register_operand" "Yk")))]
"TARGET_AVX512F"
"vpermt2<ssemodesuffix>\t{%3, %1, %0%{%4%}|%0%{%4%}, %1, %3}"
[(set_attr "type" "sselog")
@@ -15164,7 +15164,7 @@
(match_operand:SI 5 "const1248_operand" "n")]
UNSPEC_VSIBADDR)])]
UNSPEC_GATHER))
- (clobber (match_scratch:<avx512fmaskmode> 2 "=&k"))]
+ (clobber (match_scratch:<avx512fmaskmode> 2 "=&Yk"))]
"TARGET_AVX512F"
"v<sseintprefix>gatherd<ssemodesuffix>\t{%6, %0%{%2%}|%0%{%2%}, %g6}"
[(set_attr "type" "ssemov")
@@ -15183,7 +15183,7 @@
(match_operand:SI 4 "const1248_operand" "n")]
UNSPEC_VSIBADDR)])]
UNSPEC_GATHER))
- (clobber (match_scratch:<avx512fmaskmode> 1 "=&k"))]
+ (clobber (match_scratch:<avx512fmaskmode> 1 "=&Yk"))]
"TARGET_AVX512F"
"v<sseintprefix>gatherd<ssemodesuffix>\t{%5, %0%{%1%}|%0%{%1%}, %g5}"
[(set_attr "type" "ssemov")
@@ -15222,7 +15222,7 @@
(match_operand:SI 5 "const1248_operand" "n")]
UNSPEC_VSIBADDR)])]
UNSPEC_GATHER))
- (clobber (match_scratch:QI 2 "=&k"))]
+ (clobber (match_scratch:QI 2 "=&Yk"))]
"TARGET_AVX512F"
"v<sseintprefix>gatherq<ssemodesuffix>\t{%6, %1%{%2%}|%1%{%2%}, %g6}"
[(set_attr "type" "ssemov")
@@ -15241,7 +15241,7 @@
(match_operand:SI 4 "const1248_operand" "n")]
UNSPEC_VSIBADDR)])]
UNSPEC_GATHER))
- (clobber (match_scratch:QI 1 "=&k"))]
+ (clobber (match_scratch:QI 1 "=&Yk"))]
"TARGET_AVX512F"
{
if (<MODE>mode != <VEC_GATHER_SRCDI>mode)
@@ -15281,7 +15281,7 @@
[(match_operand:<avx512fmaskmode> 6 "register_operand" "1")
(match_operand:VI48F_512 3 "register_operand" "v")]
UNSPEC_SCATTER))
- (clobber (match_scratch:<avx512fmaskmode> 1 "=&k"))]
+ (clobber (match_scratch:<avx512fmaskmode> 1 "=&Yk"))]
"TARGET_AVX512F"
"v<sseintprefix>scatterd<ssemodesuffix>\t{%3, %5%{%1%}|%5%{%1%}, %3}"
[(set_attr "type" "ssemov")
@@ -15317,7 +15317,7 @@
[(match_operand:QI 6 "register_operand" "1")
(match_operand:<VEC_GATHER_SRCDI> 3 "register_operand" "v")]
UNSPEC_SCATTER))
- (clobber (match_scratch:QI 1 "=&k"))]
+ (clobber (match_scratch:QI 1 "=&Yk"))]
"TARGET_AVX512F"
"v<sseintprefix>scatterq<ssemodesuffix>\t{%3, %5%{%1%}|%5%{%1%}, %3}"
[(set_attr "type" "ssemov")
@@ -15329,7 +15329,7 @@
(unspec:VI48F_512
[(match_operand:VI48F_512 1 "register_operand" "v")
(match_operand:VI48F_512 2 "vector_move_operand" "0C")
- (match_operand:<avx512fmaskmode> 3 "register_operand" "k")]
+ (match_operand:<avx512fmaskmode> 3 "register_operand" "Yk")]
UNSPEC_COMPRESS))]
"TARGET_AVX512F"
"v<sseintprefix>compress<ssemodesuffix>\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}"
@@ -15342,7 +15342,7 @@
(unspec:VI48F_512
[(match_operand:VI48F_512 1 "register_operand" "x")
(match_dup 0)
- (match_operand:<avx512fmaskmode> 2 "register_operand" "k")]
+ (match_operand:<avx512fmaskmode> 2 "register_operand" "Yk")]
UNSPEC_COMPRESS_STORE))]
"TARGET_AVX512F"
"v<sseintprefix>compress<ssemodesuffix>\t{%1, %0%{%2%}|%0%{%2%}, %1}"
@@ -15378,7 +15378,7 @@
(unspec:VI48F_512
[(match_operand:VI48F_512 1 "nonimmediate_operand" "v,m")
(match_operand:VI48F_512 2 "vector_move_operand" "0C,0C")
- (match_operand:<avx512fmaskmode> 3 "register_operand" "k,k")]
+ (match_operand:<avx512fmaskmode> 3 "register_operand" "Yk,Yk")]
UNSPEC_EXPAND))]
"TARGET_AVX512F"
"v<sseintprefix>expand<ssemodesuffix>\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}"
diff --git a/gcc/config/i386/subst.md b/gcc/config/i386/subst.md
index 7948e78..9c630f7 100644
--- a/gcc/config/i386/subst.md
+++ b/gcc/config/i386/subst.md
@@ -66,7 +66,7 @@
(vec_merge:SUBST_V
(match_dup 1)
(match_operand:SUBST_V 2 "vector_move_operand" "0C")
- (match_operand:<avx512fmaskmode> 3 "register_operand" "k")))])
+ (match_operand:<avx512fmaskmode> 3 "register_operand" "Yk")))])
(define_subst_attr "mask_scalar_merge_name" "mask_scalar_merge" "" "_mask")
(define_subst_attr "mask_scalar_merge_operand3" "mask_scalar_merge" ""
"%{%3%}")
@@ -79,7 +79,7 @@
[(set (match_dup 0)
(and:SUBST_S
(match_dup 1)
- (match_operand:SUBST_S 3 "register_operand" "k")))])
+ (match_operand:SUBST_S 3 "register_operand" "Yk")))])
(define_subst_attr "sd_maskz_name" "sd" "" "_maskz_1")
(define_subst_attr "sd_mask_op4" "sd" "" "%{%5%}%N4")
@@ -95,7 +95,7 @@
(vec_merge:SUBST_V
(match_dup 1)
(match_operand:SUBST_V 2 "const0_operand" "C")
- (match_operand:<avx512fmaskmode> 3 "register_operand" "k")))
+ (match_operand:<avx512fmaskmode> 3 "register_operand" "Yk")))
])
(define_subst_attr "round_name" "round" "" "_round")
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-inline-asm.c
b/gcc/testsuite/gcc.target/i386/avx512f-inline-asm.c
index 4e675e0..2557eab 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-inline-asm.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-inline-asm.c
@@ -42,8 +42,8 @@ avx512f_test (void)
msk_src2 = 0x0F0F;
asm ("kandw\t%2, %1, %0"
- : "=Yk" (msk_dst)
- : "Yk" (msk_src1), "Yk" (msk_src2));
+ : "=k" (msk_dst)
+ : "k" (msk_src1), "k" (msk_src2));
msk_dst_ref = _mm512_kand (msk_src1, msk_src2);
if (msk_dst != msk_dst_ref)
@@ -59,7 +59,7 @@ avx512f_test (void)
asm ("vpaddd\t%2, %1, %0 %{%3%}%{z%}"
: "=x" (dst.x)
- : "x" (src1.x), "x" (src2.x), "k" (msk_dst));
+ : "x" (src1.x), "x" (src2.x), "Yk" (msk_dst));
calc_vpadd_mask_zeroed (dst_ref, msk_dst, src1.a, src2.a);
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-kmovw-1.c
b/gcc/testsuite/gcc.target/i386/avx512f-kmovw-1.c
index c092726..9c20472 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-kmovw-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-kmovw-1.c
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* { dg-options "-mavx512f -O2" } */
-/* { dg-final { scan-assembler "kmovw\[ \\t\]+\[^\n\]*%k\[1-7\]" } } */
+/* { dg-final { scan-assembler "kmovw\[ \\t\]+\[^\n\]*%k\[0-7\]" } } */
#include <immintrin.h>
volatile __mmask16 k1;
--
1.8.3.1
