On Sat, Dec 14, 2013 at 7:58 AM, Uros Bizjak <ubiz...@gmail.com> wrote: > On Sat, Dec 14, 2013 at 3:07 PM, H.J. Lu <hjl.to...@gmail.com> wrote: > >>>> We can't change -fPIC underneath in x86 backend while middle-end is >>>> unchanged. >>>> This patch restores opts->x_flag_pic from global flag_pic. OK to install? >>>> >>>> 2013-12-12 H.J. Lu <hongjiu...@intel.com> >>>> >>>> PR target/59492 >>>> * config/i386/i386.c (ix86_function_specific_restore): Don't >>>> change -fPIC. >>> >>> Is it possible to add x32 testcase from the PR without too much troubles? >>> >> >> Here is a patch with a testcase. OK to install? >> >> 2013-12-14 H.J. Lu <hongjiu...@intel.com> >> >> PR target/59492 >> * config/i386/i386.c (ix86_function_specific_restore): Don't >> change -fPIC. >> >> gcc/testsuite/ >> >> 2013-12-14 H.J. Lu <hongjiu...@intel.com> >> >> PR target/59492 >> * g++.dg/ext/pr59492.C: New file. > > OK for mainline, with some testcase changes below. > >> diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c >> index 1b962e1..b8172c3 100644 >> --- a/gcc/config/i386/i386.c >> +++ b/gcc/config/i386/i386.c >> @@ -4337,6 +4337,9 @@ ix86_function_specific_restore (struct gcc_options >> *opts, >> unsigned int ix86_arch_mask; >> int i; >> >> + /* We don't change -fPIC. */ >> + opts->x_flag_pic = flag_pic; >> + >> ix86_arch = (enum processor_type) ptr->arch; >> ix86_schedule = (enum attr_cpu) ptr->schedule; >> ix86_tune = (enum processor_type) ptr->tune; >> diff --git a/gcc/testsuite/g++.dg/ext/pr59492.C >> b/gcc/testsuite/g++.dg/ext/pr59492.C >> new file mode 100644 >> index 0000000..f626b6b >> --- /dev/null >> +++ b/gcc/testsuite/g++.dg/ext/pr59492.C > > Please put this test to g++.dg/other/... directory. > >> @@ -0,0 +1,18 @@ >> +// { dg-options "-mx32 -fPIC" } >> +// { dg-do assemble { target i?86-*-* x86_64-*-* } } > > // { dg-do assemble { target { { i?86-*-* x86_64-*-* } && fpic } } } > > (also, please put dg-options after dg-do directive). > >> +// { dg-require-ifunc "" } >> +// { dg-require-effective-target maybe_x32 } >> + >> +void >> +__throw_runtime_error(const char*) __attribute__((__noreturn__)); >> +unsigned int >> +__attribute__ ((target("rdrnd"))) >> +__x86_rdrand(void) >> +{ >> + unsigned int retries = 100; >> + unsigned int val; >> + while (__builtin_ia32_rdrand32_step(&val) == 0) >> + if (--retries == 0) >> + __throw_runtime_error(("random_device::__x86_rdrand(void)")); >> + return val; >> +} > > Thanks, > Uros.
This is what I checked in. -- H.J. --- gcc/ 2013-12-14 H.J. Lu <hongjiu...@intel.com> PR target/59492 * config/i386/i386.c (ix86_function_specific_restore): Don't change -fPIC. gcc/testsuite/ 2013-12-14 H.J. Lu <hongjiu...@intel.com> PR target/59492 * g++.dg/other/pr59492.C: New file. diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 1b962e1..b8172c3 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -4337,6 +4337,9 @@ ix86_function_specific_restore (struct gcc_options *opts, unsigned int ix86_arch_mask; int i; + /* We don't change -fPIC. */ + opts->x_flag_pic = flag_pic; + ix86_arch = (enum processor_type) ptr->arch; ix86_schedule = (enum attr_cpu) ptr->schedule; ix86_tune = (enum processor_type) ptr->tune; diff --git a/gcc/testsuite/g++.dg/other/pr59492.C b/gcc/testsuite/g++.dg/other/pr59492.C new file mode 100644 index 0000000..84bd255 --- /dev/null +++ b/gcc/testsuite/g++.dg/other/pr59492.C @@ -0,0 +1,18 @@ +// { dg-do assemble { target { { i?86-*-* x86_64-*-* } && fpic } } } +// { dg-options "-mx32 -fPIC" } +// { dg-require-ifunc "" } +// { dg-require-effective-target maybe_x32 } + +void +__throw_runtime_error(const char*) __attribute__((__noreturn__)); +unsigned int +__attribute__ ((target("rdrnd"))) +__x86_rdrand(void) +{ + unsigned int retries = 100; + unsigned int val; + while (__builtin_ia32_rdrand32_step(&val) == 0) + if (--retries == 0) + __throw_runtime_error(("random_device::__x86_rdrand(void)")); + return val; +}