Hi!
As we create SIMD clones for all of SSE2, AVX and AVX2 ISAs right now,
the assembler needs to support SSE2, AVX and AVX2. Apparently some folks
are still using binutils that don't handle that, this patch conditionalizes
the test on that.
Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?
2013-11-28 Jakub Jelinek <ja...@redhat.com>
PR lto/59326
* gcc.target/i386/i386.exp (check_effective_target_avx2): Move to...
* lib/target-supports.exp (check_effective_target_avx2): ... here.
(check_effective_target_vect_simd_clones): New.
* gcc.dg/vect/vect-simd-clone-1.c: Add dg-require-effective-target
vect_simd_clones.
* gcc.dg/vect/vect-simd-clone-2.c: Likewise.
* gcc.dg/vect/vect-simd-clone-3.c: Likewise.
* gcc.dg/vect/vect-simd-clone-4.c: Likewise.
* gcc.dg/vect/vect-simd-clone-5.c: Likewise.
* gcc.dg/vect/vect-simd-clone-6.c: Likewise.
* gcc.dg/vect/vect-simd-clone-7.c: Likewise.
* gcc.dg/vect/vect-simd-clone-8.c: Likewise.
* gcc.dg/vect/vect-simd-clone-9.c: Likewise.
* gcc.dg/vect/vect-simd-clone-10.c: Likewise.
* gcc.dg/vect/vect-simd-clone-11.c: Likewise.
--- gcc/testsuite/gcc.target/i386/i386.exp.jj 2013-01-11 09:02:38.000000000
+0100
+++ gcc/testsuite/gcc.target/i386/i386.exp 2013-11-28 13:36:40.464167773
+0100
@@ -209,18 +209,6 @@ proc check_effective_target_lzcnt { } {
} "-mlzcnt" ]
}
-# Return 1 if avx2 instructions can be compiled.
-proc check_effective_target_avx2 { } {
- return [check_no_compiler_messages avx2 object {
- typedef long long __v4di __attribute__ ((__vector_size__ (32)));
- __v4di
- mm256_is32_andnotsi256 (__v4di __X, __v4di __Y)
- {
- return __builtin_ia32_andnotsi256 (__X, __Y);
- }
- } "-O0 -mavx2" ]
-}
-
# Return 1 if bmi instructions can be compiled.
proc check_effective_target_bmi { } {
return [check_no_compiler_messages bmi object {
--- gcc/testsuite/lib/target-supports.exp.jj 2013-11-15 09:39:37.000000000
+0100
+++ gcc/testsuite/lib/target-supports.exp 2013-11-28 13:35:54.408422777
+0100
@@ -2146,6 +2146,32 @@ proc check_effective_target_vect_floatui
return $et_vect_floatuint_cvt_saved
}
+# Return 1 if the target supports #pragma omp declare simd, 0 otherwise.
+#
+# This won't change for different subtargets so cache the result.
+
+proc check_effective_target_vect_simd_clones { } {
+ global et_vect_simd_clones_saved
+
+ if [info exists et_vect_simd_clones_saved] {
+ verbose "check_effective_target_vect_simd_clones: using cached result" 2
+ } else {
+ set et_vect_simd_clones_saved 0
+ if { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
+ # On i?86/x86_64 #pragma omp declare simd builds a sse2, avx and
+ # avx2 clone. Only the right clone for the specified arch will be
+ # chosen, but still we need to at least be able to assemble
+ # avx2.
+ if { [check_effective_target_avx2] } {
+ set et_vect_simd_clones_saved 1
+ }
+ }
+ }
+
+ verbose "check_effective_target_vect_simd_clones: returning
$et_vect_simd_clones_saved" 2
+ return $et_vect_simd_clones_saved
+}
+
# Return 1 if this is a AArch64 target supporting big endian
proc check_effective_target_aarch64_big_endian { } {
return [check_no_compiler_messages aarch64_big_endian assembly {
@@ -5106,6 +5132,18 @@ proc check_effective_target_avx { } {
} "-O2 -mavx" ]
}
+# Return 1 if avx2 instructions can be compiled.
+proc check_effective_target_avx2 { } {
+ return [check_no_compiler_messages avx2 object {
+ typedef long long __v4di __attribute__ ((__vector_size__ (32)));
+ __v4di
+ mm256_is32_andnotsi256 (__v4di __X, __v4di __Y)
+ {
+ return __builtin_ia32_andnotsi256 (__X, __Y);
+ }
+ } "-O0 -mavx2" ]
+}
+
# Return 1 if sse instructions can be compiled.
proc check_effective_target_sse { } {
return [check_no_compiler_messages sse object {
--- gcc/testsuite/gcc.dg/vect/vect-simd-clone-1.c.jj 2013-11-27
12:15:14.000000000 +0100
+++ gcc/testsuite/gcc.dg/vect/vect-simd-clone-1.c 2013-11-28
13:24:55.345839723 +0100
@@ -1,3 +1,4 @@
+/* { dg-require-effective-target vect_simd_clones } */
/* { dg-additional-options "-fopenmp-simd" } */
/* { dg-additional-options "-mavx" { target avx_runtime } } */
--- gcc/testsuite/gcc.dg/vect/vect-simd-clone-2.c.jj 2013-11-27
12:15:14.000000000 +0100
+++ gcc/testsuite/gcc.dg/vect/vect-simd-clone-2.c 2013-11-28
13:25:43.158572535 +0100
@@ -1,3 +1,4 @@
+/* { dg-require-effective-target vect_simd_clones } */
/* { dg-additional-options "-fopenmp-simd" } */
/* { dg-additional-options "-mavx" { target avx_runtime } } */
--- gcc/testsuite/gcc.dg/vect/vect-simd-clone-3.c.jj 2013-11-27
12:15:14.000000000 +0100
+++ gcc/testsuite/gcc.dg/vect/vect-simd-clone-3.c 2013-11-28
13:25:46.065577204 +0100
@@ -1,3 +1,4 @@
+/* { dg-require-effective-target vect_simd_clones } */
/* { dg-additional-options "-fopenmp-simd" } */
/* { dg-additional-options "-mavx" { target avx_runtime } } */
--- gcc/testsuite/gcc.dg/vect/vect-simd-clone-4.c.jj 2013-11-27
12:15:14.000000000 +0100
+++ gcc/testsuite/gcc.dg/vect/vect-simd-clone-4.c 2013-11-28
13:25:48.995559597 +0100
@@ -1,3 +1,4 @@
+/* { dg-require-effective-target vect_simd_clones } */
/* { dg-additional-options "-fopenmp-simd" } */
/* { dg-additional-options "-mavx" { target avx_runtime } } */
--- gcc/testsuite/gcc.dg/vect/vect-simd-clone-5.c.jj 2013-11-27
12:15:14.000000000 +0100
+++ gcc/testsuite/gcc.dg/vect/vect-simd-clone-5.c 2013-11-28
13:25:51.973546669 +0100
@@ -1,3 +1,4 @@
+/* { dg-require-effective-target vect_simd_clones } */
/* { dg-additional-options "-fopenmp-simd" } */
/* { dg-additional-options "-mavx" { target avx_runtime } } */
--- gcc/testsuite/gcc.dg/vect/vect-simd-clone-6.c.jj 2013-11-27
12:15:14.000000000 +0100
+++ gcc/testsuite/gcc.dg/vect/vect-simd-clone-6.c 2013-11-28
13:25:56.014520288 +0100
@@ -1,3 +1,4 @@
+/* { dg-require-effective-target vect_simd_clones } */
/* { dg-additional-options "-fopenmp-simd" } */
/* { dg-additional-options "-mavx" { target avx_runtime } } */
--- gcc/testsuite/gcc.dg/vect/vect-simd-clone-7.c.jj 2013-11-27
12:15:14.000000000 +0100
+++ gcc/testsuite/gcc.dg/vect/vect-simd-clone-7.c 2013-11-28
13:25:59.357501867 +0100
@@ -1,3 +1,4 @@
+/* { dg-require-effective-target vect_simd_clones } */
/* { dg-additional-options "-fopenmp-simd" } */
/* { dg-additional-options "-mavx" { target avx_runtime } } */
--- gcc/testsuite/gcc.dg/vect/vect-simd-clone-8.c.jj 2013-11-27
12:15:14.000000000 +0100
+++ gcc/testsuite/gcc.dg/vect/vect-simd-clone-8.c 2013-11-28
13:26:02.247490531 +0100
@@ -1,3 +1,4 @@
+/* { dg-require-effective-target vect_simd_clones } */
/* { dg-additional-options "-fopenmp-simd" } */
/* { dg-additional-options "-mavx" { target avx_runtime } } */
--- gcc/testsuite/gcc.dg/vect/vect-simd-clone-9.c.jj 2013-11-27
12:15:14.000000000 +0100
+++ gcc/testsuite/gcc.dg/vect/vect-simd-clone-9.c 2013-11-28
13:26:05.176474430 +0100
@@ -1,3 +1,4 @@
+/* { dg-require-effective-target vect_simd_clones } */
/* { dg-additional-options "-fopenmp-simd" } */
/* { dg-additional-options "-mavx" { target avx_runtime } } */
--- gcc/testsuite/gcc.dg/vect/vect-simd-clone-10.c.jj 2013-11-27
12:15:14.000000000 +0100
+++ gcc/testsuite/gcc.dg/vect/vect-simd-clone-10.c 2013-11-28
13:25:07.801776994 +0100
@@ -1,3 +1,4 @@
+/* { dg-require-effective-target vect_simd_clones } */
/* { dg-additional-options "-fopenmp-simd" } */
/* { dg-additional-options "-mavx" { target avx_runtime } } */
/* { dg-additional-sources vect-simd-clone-10a.c } */
--- gcc/testsuite/gcc.dg/vect/vect-simd-clone-11.c.jj 2013-11-27
12:15:14.000000000 +0100
+++ gcc/testsuite/gcc.dg/vect/vect-simd-clone-11.c 2013-11-28
13:25:18.300726999 +0100
@@ -1,3 +1,4 @@
+/* { dg-require-effective-target vect_simd_clones } */
/* { dg-additional-options "-fopenmp-simd" } */
/* { dg-additional-options "-mavx" { target avx_runtime } } */
Jakub
