On 11/22/13 15:24, Eric Botcazou wrote:
Well, the baseline is:
eric@polaris:~/build/gcc/native> gcc/xgcc -v
Using built-in specs.
COLLECT_GCC=gcc/xgcc
Target: x86_64-suse-linux
Configured with: /home/eric/svn/gcc/configure --build=x86_64-suse-linux --
prefix=/home/eric/install/gcc --enable-languages=c,c++,objc,obj-
c++,java,fortran,ada --enable-checking=yes,rtl --enable-__cxa_atexit --
disable-nls
Thread model: posix
gcc version 4.9.0 20131122 (experimental) [trunk revision 205244] (GCC)
Ha. Now I see it. At some point I must have moved from looking at
emit_group_store to emit_group_load_1 which has the same comment
"Optimize the access just a bit." Confused the hell out of me.
I'm having a hard time seeing why this change was made:
/* Optimize the access just a bit. */
- if (MEM_P (dest)
- && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (dest))
- || MEM_ALIGN (dest) >= GET_MODE_ALIGNMENT (mode))
- && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
- && bytelen == GET_MODE_SIZE (mode))
+ else if (MEM_P (dest)
+ && (!SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (dest))
+ || MEM_ALIGN (dest) >= GET_MODE_ALIGNMENT (mode))
+ && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
+ && bytelen == GET_MODE_SIZE (mode))
emit_move_insn (adjust_address (dest, mode, bytepos), tmps[i]);
Because we're adding a call to store_bit_field and don't want to store twice.
Yea, that's pretty obvious when looking at the right code :-)
Good to go. Sorry for the confusion and delay.
jeff
