From 9d1328df43a88e601213b0e977e4bd07abc798d3 Mon Sep 17 00:00:00 2001
From: David Holsgrove <david.holsgrove@xilinx.com>
Date: Thu, 23 May 2013 10:51:32 +1000
Subject: [PATCH 02/11] [Patch, microblaze]: Fix bswaphi2 implementation

MicroBlaze insn swaph swaps the contents of register rA
as two halfwords placing result in rD;

(rD)[0:15]  <- (rA)[16:31]
(rD)[16:31] <- (rA)[0:15]

gcc bswaphi2 is intended to reverse the order of the bytes
in the half integer in rA

(rD)[8:15]  <- (rA)[0:7]
(rD)[7:0]   <- (rA)[8:15]
(rD)[24:31] <- (rA)[16:23]
(rD)[16:23] <- (rA)[24:31]

Correct microblaze bswaphi2 insn pattern to be a
swapb followed by swaph

Changelog

2013-11-26  David Holsgrove <david.holsgrove@xilinx.com>

 * gcc/config/microblaze/microblaze.md: Correct bswaphi2 insn

Reported-by: Nathan Rossi <nathan.rossi@xilinx.com>
Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
---
 gcc/config/microblaze/microblaze.md |    3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
index 81a6a22..d7e9c5f 100644
--- a/gcc/config/microblaze/microblaze.md
+++ b/gcc/config/microblaze/microblaze.md
@@ -365,7 +365,8 @@
   [(set (match_operand:HI 0 "register_operand" "=r")
         (bswap:HI (match_operand:HI 1 "register_operand" "r")))]
   "TARGET_REORDER"
-  "swaph %0, %1"
+  "swapb %0, %1
+   swaph %0, %0"
 )
 
 ;;----------------------------------------------------------------
-- 
1.7.9.5

