Hi,
We do not yet have a pipeline model for Cortex-A57. The most sensible
thing we can use to generate pipeline schedules is another "big"-like
processor.
For that we can use the Cortex-A15 model.
Tested in series on aarch64-none-elf with no regressions.
OK?
Thanks,
James
---
gcc/
2013-11-13 James Greenhalgh <james.greenha...@arm.com>
* config/aarch64/aarch64-cores.def (cortex-a57): Tune for cortexa15.
* config/aarch64/aarch64-tune.md: Regenerate.
* config/aarch64/aarch64.md: Include cortex-a15 pipeline model.
(generic_sched): "no" if we are tuning for cortexa15.
* config/arm/cortex-a15.md: Include cortex-a15-neon.md by
relative path.
diff --git a/gcc/config/aarch64/aarch64-cores.def b/gcc/config/aarch64/aarch64-cores.def
index c840aa0..1845358 100644
--- a/gcc/config/aarch64/aarch64-cores.def
+++ b/gcc/config/aarch64/aarch64-cores.def
@@ -35,6 +35,6 @@
therefore serves as a template for adding more CPUs in the future. */
AARCH64_CORE("cortex-a53", cortexa53, 8, AARCH64_FL_FPSIMD, generic)
-AARCH64_CORE("cortex-a57", cortexa57, 8, AARCH64_FL_FPSIMD, generic)
+AARCH64_CORE("cortex-a57", cortexa15, 8, AARCH64_FL_FPSIMD, generic)
AARCH64_CORE("example-1", large, 8, AARCH64_FL_FPSIMD, generic)
AARCH64_CORE("example-2", small, 8, AARCH64_FL_FPSIMD, generic)
diff --git a/gcc/config/aarch64/aarch64-tune.md b/gcc/config/aarch64/aarch64-tune.md
index 02699e35c3fca8e00b45347c68e3b17286df721b..1bde99bec57c5defc35d24eb4c141aab70f616d2 100644
--- a/gcc/config/aarch64/aarch64-tune.md
+++ b/gcc/config/aarch64/aarch64-tune.md
@@ -1,5 +1,5 @@
;; -*- buffer-read-only: t -*-
;; Generated automatically by gentune.sh from aarch64-cores.def
(define_attr "tune"
- "cortexa53,cortexa57,large,small"
+ "cortexa53,cortexa15,large,small"
(const (symbol_ref "((enum attr_tune) aarch64_tune)")))
diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index d66b41dcb42e458735c907f8e2de9f6ef206ac03..6f828e26c594994701d150396972b2a3dcd9196f 100644
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -312,7 +312,7 @@ (define_attr "enabled" "no,yes"
(define_attr "generic_sched" "yes,no"
(const (if_then_else
- (eq_attr "tune" "large,small,cortexa53")
+ (eq_attr "tune" "large,small,cortexa53,cortexa15")
(const_string "no")
(const_string "yes"))))
@@ -320,6 +320,7 @@ (define_attr "generic_sched" "yes,no"
(include "large.md")
(include "small.md")
(include "../arm/cortex-a53.md")
+(include "../arm/cortex-a15.md")
;; -------------------------------------------------------------------
;; Jumps and other miscellaneous insns
diff --git a/gcc/config/arm/cortex-a15.md b/gcc/config/arm/cortex-a15.md
index ccad62076089b5e095f472fdbf298ba7226ae4ec..5a31a097918f7a01b38671416ece350049f00e28 100644
--- a/gcc/config/arm/cortex-a15.md
+++ b/gcc/config/arm/cortex-a15.md
@@ -158,7 +158,7 @@ (define_insn_reservation "cortex_a15_sto
"ca15_issue2,ca15_ls1+ca15_ls2,ca15_str,ca15_str")
;; We include Neon.md here to ensure that the branch can block the Neon units.
-(include "cortex-a15-neon.md")
+(include "../arm/cortex-a15-neon.md")
;; We lie with calls. They take up all issue slots, and form a block in the
;; pipeline. The result however is available the next cycle.
