"Moore, Catherine" <catherine_mo...@mentor.com> writes: > Hi Richard, > > This patch implements a workaround for errors on the PMC-Sierra RM7000 > cpu while executing the dmult or dmultu instruction. The workaround > is to insert three nops after the dmult/dmultu.
Do you have any more details? E.g. does "dmult $4,$5;addiu $6,$7,1" cause problems? The VR41xx series had errata like these, but it was always between the multiplication and other references to HI/LO. Normally we've handled this by getting the assembler to insert the nops and compiling in .set reorder mode. That copes with inline asms too. I'm not opposed to doing it differently if there's a specific reason though. > Index: config/mips/mips.md > =================================================================== > --- config/mips/mips.md (revision 203320) > +++ config/mips/mips.md (working copy) > @@ -1485,6 +1485,8 @@ > } > else if (TARGET_FIX_R4000) > emit_insn (gen_mul<mode>3_r4000 (operands[0], operands[1], operands[2])); > + else if (TARGET_FIX_PMC && TARGET_64BIT) > + emit_insn (gen_mul<mode>3_pmc (operands[0], operands[1], operands[2])); > else > emit_insn > (gen_mul<mode>3_internal (operands[0], operands[1], operands[2])); > @@ -1548,11 +1550,21 @@ > [(set (match_operand:GPR 0 "muldiv_target_operand" "=l") > (mult:GPR (match_operand:GPR 1 "register_operand" "d") > (match_operand:GPR 2 "register_operand" "d")))] > - "ISA_HAS_<D>MULT && !TARGET_FIX_R4000" > + "ISA_HAS_<D>MULT && !TARGET_FIX_R4000 && !(TARGET_FIX_PMC && TARGET_64BIT)" > "<d>mult\t%1,%2" > [(set_attr "type" "imul") > (set_attr "mode" "<MODE>")]) > > +(define_insn "mul<mode>3_pmc" > + [(set (match_operand:GPR 0 "muldiv_target_operand" "=l") > + (mult:GPR (match_operand:GPR 1 "register_operand" "d") > + (match_operand:GPR 2 "register_operand" "d")))] > + "ISA_HAS_<D>MULT && TARGET_FIX_PMC && TARGET_64BIT" > + "<d>mult\t%1,%2\;nop\;nop\;nop" > + [(set_attr "type" "imul") > + (set_attr "mode" "<MODE>") > + (set_attr "length" "16")]) mul<mode>3_pmc is only handling one case (dmult), so it shouldn't use GPR iterators. It looks the code above would add the nops after 32-bit MULT when generating 64-bit output. Thanks, Richard
