This patch adds support for the RL78/G10 variant, which doesn't have
register banks like the other RL78 chips. Committed.
* config/rl78/rl78.c (rl78_asm_file_start): Specify alternate
vregs location for RL78/G10.
(rl78_expand_prologue): Avoid SEL on G10.
(rl78_expand_epilogue): Likewise.
(rl78_peep_movhi_p): Can't move a constant to memory in HImode.
* config/rl78/rl78.h (TARGET_CPU_CPP_BUILTINS): Define
__RL78_G10__ when appropriate.
(ASM_SPEC): Pass -mg10 along to the assembler.
* config/rl78/rl78.md (sel_rb): Disable for G10.
* config/rl78/rl78.opt: Add -mg10 option.
* config/rl78/t-rl78: Add -mg10 multilib.
* config/rl78/lib2mul.c: Enable for RL78/G10.
* config/rl78/lib2div.c: Likewise.
* config/rl78/lshrsi3.S: Use vregs.h.
* config/rl78/cmpsi2.S: Likewise.
* config/rl78/trampoline.S: Likewise.
* config/rl78/mulsi2.S: Likewise. Disable for RL78/G10.
Index: gcc/config/rl78/rl78.h
===================================================================
--- gcc/config/rl78/rl78.h (revision 202636)
+++ gcc/config/rl78/rl78.h (working copy)
@@ -29,24 +29,27 @@
builtin_define ("__RL78__"); \
builtin_assert ("cpu=RL78"); \
if (RL78_MUL_RL78) \
builtin_define ("__RL78_MUL_RL78__"); \
if (RL78_MUL_G13) \
builtin_define ("__RL78_MUL_G13__"); \
+ if (TARGET_G10) \
+ builtin_define ("__RL78_G10__"); \
} \
while (0)
#undef STARTFILE_SPEC
#define STARTFILE_SPEC "%{pg:gcrt0.o%s}%{!pg:crt0.o%s} crtbegin.o%s"
#undef ENDFILE_SPEC
#define ENDFILE_SPEC "crtend.o%s crtn.o%s"
#undef ASM_SPEC
#define ASM_SPEC "\
%{mrelax:-relax} \
+%{mg10} \
"
#undef LINK_SPEC
#define LINK_SPEC "\
%{mrelax:-relax} \
"
Index: gcc/config/rl78/rl78.c
===================================================================
--- gcc/config/rl78/rl78.c (revision 202636)
+++ gcc/config/rl78/rl78.c (working copy)
@@ -256,16 +256,26 @@ make_pass_rl78_move_elim (gcc::context *
static void
rl78_asm_file_start (void)
{
int i;
- for (i = 0; i < 8; i++)
+ if (TARGET_G10)
{
- fprintf (asm_out_file, "r%d\t=\t0x%x\n", 8 + i, 0xffef0 + i);
- fprintf (asm_out_file, "r%d\t=\t0x%x\n", 16 + i, 0xffee8 + i);
+ /* The memory used is 0xffec8 to 0xffedf; real registers are in
+ 0xffee0 to 0xffee7. */
+ for (i = 8; i < 32; i++)
+ fprintf (asm_out_file, "r%d\t=\t0x%x\n", i, 0xffec0 + i);
+ }
+ else
+ {
+ for (i = 0; i < 8; i++)
+ {
+ fprintf (asm_out_file, "r%d\t=\t0x%x\n", 8 + i, 0xffef0 + i);
+ fprintf (asm_out_file, "r%d\t=\t0x%x\n", 16 + i, 0xffee8 + i);
+ }
}
opt_pass *rl78_devirt_pass = make_pass_rl78_devirt (g);
static struct register_pass_info rl78_devirt_info =
{
rl78_devirt_pass,
@@ -1015,25 +1025,32 @@ rl78_expand_prologue (void)
if (!cfun->machine->computed)
rl78_compute_frame_info ();
if (flag_stack_usage_info)
current_function_static_stack_size = cfun->machine->framesize;
- if (is_interrupt_func (cfun->decl))
+ if (is_interrupt_func (cfun->decl) && !TARGET_G10)
emit_insn (gen_sel_rb (GEN_INT (0)));
for (i = 0; i < 16; i++)
if (cfun->machine->need_to_push [i])
{
- int need_bank = i/4;
- if (need_bank != rb)
+ if (TARGET_G10)
{
- emit_insn (gen_sel_rb (GEN_INT (need_bank)));
- rb = need_bank;
+ emit_move_insn (gen_rtx_REG (HImode, 0), gen_rtx_REG (HImode, i*2));
+ F (emit_insn (gen_push (gen_rtx_REG (HImode, 0))));
}
- F (emit_insn (gen_push (gen_rtx_REG (HImode, i*2))));
+ else {
+ int need_bank = i/4;
+ if (need_bank != rb)
+ {
+ emit_insn (gen_sel_rb (GEN_INT (need_bank)));
+ rb = need_bank;
+ }
+ F (emit_insn (gen_push (gen_rtx_REG (HImode, i*2))));
+ }
}
if (rb != 0)
emit_insn (gen_sel_rb (GEN_INT (0)));
if (frame_pointer_needed)
{
@@ -1082,20 +1099,28 @@ rl78_expand_epilogue (void)
}
}
for (i = 15; i >= 0; i--)
if (cfun->machine->need_to_push [i])
{
- int need_bank = i / 4;
-
- if (need_bank != rb)
+ if (TARGET_G10)
{
- emit_insn (gen_sel_rb (GEN_INT (need_bank)));
- rb = need_bank;
+ emit_insn (gen_pop (gen_rtx_REG (HImode, 0)));
+ emit_move_insn (gen_rtx_REG (HImode, i*2), gen_rtx_REG (HImode, 0));
+ }
+ else
+ {
+ int need_bank = i / 4;
+
+ if (need_bank != rb)
+ {
+ emit_insn (gen_sel_rb (GEN_INT (need_bank)));
+ rb = need_bank;
+ }
+ emit_insn (gen_pop (gen_rtx_REG (HImode, i * 2)));
}
- emit_insn (gen_pop (gen_rtx_REG (HImode, i * 2)));
}
if (rb != 0)
emit_insn (gen_sel_rb (GEN_INT (0)));
if (cfun->machine->trampolines_used)
@@ -1627,12 +1652,22 @@ rl78_peep_movhi_p (rtx *operands)
debug_rtx (operands[1]);
debug_rtx (operands[2]);
debug_rtx (operands[3]);
fprintf (stderr, "\033[0m");
#endif
+ /* You can move a constant to memory as QImode, but not HImode. */
+ if (GET_CODE (operands[0]) == MEM
+ && GET_CODE (operands[1]) != REG)
+ {
+#if DEBUG_PEEP
+ fprintf (stderr, "no peep: move constant to memory\n");
+#endif
+ return false;
+ }
+
if (rtx_equal_p (operands[0], operands[3]))
{
#if DEBUG_PEEP
fprintf (stderr, "no peep: overlapping\n");
#endif
return false;
Index: gcc/config/rl78/rl78.opt
===================================================================
--- gcc/config/rl78/rl78.opt (revision 202636)
+++ gcc/config/rl78/rl78.opt (working copy)
@@ -42,6 +42,10 @@ Enum(rl78_mul_types) String(rl78) Value(
EnumValue
Enum(rl78_mul_types) String(g13) Value(MUL_G13)
mrelax
Target
Enable assembler and linker relaxation.
+
+mg10
+Target Mask(G10)
+Target the RL78/G10 series
Index: gcc/config/rl78/t-rl78
===================================================================
--- gcc/config/rl78/t-rl78 (revision 202636)
+++ gcc/config/rl78/t-rl78 (working copy)
@@ -17,6 +17,11 @@
# You should have received a copy of the GNU General Public
# License along with GCC; see the file COPYING3. If not see
# <http://www.gnu.org/licenses/>.
rl78-c.o: $(srcdir)/config/rl78/rl78-c.c $(RTL_H) $(TREE_H) $(CONFIG_H) $(TM_H)
$(COMPILER) -c $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $<
+
+# Enable multilibs:
+
+MULTILIB_OPTIONS = mg10
+MULTILIB_DIRNAMES = g10
Index: libgcc/config/rl78/lib2mul.c
===================================================================
--- libgcc/config/rl78/lib2mul.c (revision 202636)
+++ libgcc/config/rl78/lib2mul.c (working copy)
@@ -27,18 +27,31 @@ typedef unsigned int uint32_type __at
typedef unsigned int uint16_type __attribute__ ((mode (HI)));
typedef unsigned int uint08_type __attribute__ ((mode (QI)));
#define C3B(a,b,c) a##b##c
#define C3(a,b,c) C3B(a,b,c)
+#ifdef __RL78_G10__
+
+#define UINT_TYPE uint32_type
+#define BITS_MINUS_1 31
+#define NAME_MODE si
+
+#include "rl78-mul.h"
+
+#undef UINT_TYPE
+#undef BITS_MINUS_1
+#undef NAME_MODE
#define UINT_TYPE uint16_type
#define BITS_MINUS_1 15
#define NAME_MODE hi
-/*#include "rl78-mul.h"*/
+#include "rl78-mul.h"
+
+#endif
#undef UINT_TYPE
#undef BITS_MINUS_1
#undef NAME_MODE
#define UINT_TYPE uint08_type
Index: libgcc/config/rl78/lshrsi3.S
===================================================================
--- libgcc/config/rl78/lshrsi3.S (revision 202636)
+++ libgcc/config/rl78/lshrsi3.S (working copy)
@@ -17,28 +17,13 @@
;
; You should have received a copy of the GNU General Public License and
; a copy of the GCC Runtime Library Exception along with this program;
; see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
; <http://www.gnu.org/licenses/>.
-r8 = 0xffef0
-r16 = 0xffee8
-r9 = 0xffef1
-r17 = 0xffee9
-r10 = 0xffef2
-r18 = 0xffeea
-r11 = 0xffef3
-r19 = 0xffeeb
-r12 = 0xffef4
-r20 = 0xffeec
-r13 = 0xffef5
-r21 = 0xffeed
-r14 = 0xffef6
-r22 = 0xffeee
-r15 = 0xffef7
-r23 = 0xffeef
+#include "vregs.h"
.text
.global ___lshrsi3
.type ___lshrsi3, @function
___lshrsi3:
Index: libgcc/config/rl78/cmpsi2.S
===================================================================
--- libgcc/config/rl78/cmpsi2.S (revision 202636)
+++ libgcc/config/rl78/cmpsi2.S (working copy)
@@ -18,14 +18,13 @@
; You should have received a copy of the GNU General Public License and
; a copy of the GCC Runtime Library Exception along with this program;
; see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
; <http://www.gnu.org/licenses/>.
-; clobberable
-r8 = 0xffef0
+#include "vregs.h"
.text
;; int __cmpsi2 (signed long A, signed long B)
;;
;; Performs a signed comparison of A and B.
Index: libgcc/config/rl78/trampoline.S
===================================================================
--- libgcc/config/rl78/trampoline.S (revision 202636)
+++ libgcc/config/rl78/trampoline.S (working copy)
@@ -29,15 +29,13 @@
function pointer to point to a trampoline on the stack. So, we
create N fixed trampolines that read from an array, and allocate
them as needed.
*/
-r8 = 0xffef0
-r10 = 0xffef2
-r14 = 0xffef6
+#include "vregs.h"
.data
.p2align 1
trampoline_array:
.macro stub n
Index: libgcc/config/rl78/lib2div.c
===================================================================
--- libgcc/config/rl78/lib2div.c (revision 202636)
+++ libgcc/config/rl78/lib2div.c (working copy)
@@ -31,13 +31,13 @@ typedef int sint08_type __at
typedef unsigned int uint08_type __attribute__ ((mode (QI)));
typedef int word_type __attribute__ ((mode (__word__)));
#define C3B(a,b,c) a##b##c
#define C3(a,b,c) C3B(a,b,c)
-#if 0
+#ifdef __RL78_G10__
#define UINT_TYPE uint32_type
#define SINT_TYPE sint32_type
#define BITS_MINUS_1 31
#define NAME_MODE si
Index: libgcc/config/rl78/mulsi3.S
===================================================================
--- libgcc/config/rl78/mulsi3.S (revision 202636)
+++ libgcc/config/rl78/mulsi3.S (working copy)
@@ -19,41 +19,18 @@
; a copy of the GCC Runtime Library Exception along with this program;
; see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
; <http://www.gnu.org/licenses/>.
;; 32x32=32 multiply
-; real
-; GAS defines r0..r7 as aliases for real registers; we want the saddr
-; forms here.
-r_0 = 0xffef8
-r_1 = 0xffef9
-r_2 = 0xffefa
-r_3 = 0xffefb
-r_4 = 0xffefc
-r_5 = 0xffefd
-r_6 = 0xffefe
-r_7 = 0xffeff
-; clobberable
-r8 = 0xffef0
-r9 = 0xffef1
-r10 = 0xffef2
-r11 = 0xffef3
-r12 = 0xffef4
-r13 = 0xffef5
-r14 = 0xffef6
-r15 = 0xffef7
-; preserved
-r16 = 0xffee8
-r17 = 0xffee9
-r18 = 0xffeea
-r19 = 0xffeeb
-r20 = 0xffeec
-r21 = 0xffeed
-r22 = 0xffeee
-r23 = 0xffeef
+#include "vregs.h"
+
+; the G10 only has one register bank, so cannot use these optimized
+; versions. Use the C version instead.
+
+#ifndef __RL78_G10__
;----------------------------------------------------------------------
; Register use:
; RB0 RB1 RB2
@@ -218,6 +195,8 @@ ___mulhi3:
bc $.Lmul_hi_top
cmpw ax, #0
bnz $.Lmul_hi_no_add
.Lmul_hi_done:
ret
+
+#endif
