This patch fixes a number of test failures in gcc.target/aarch64/v*.c in
ILP32.
The corresponding RTL patterns for some load/store builtins have Pmode
(i.e. DImode) specified for their address operands. However, coming
from a pointer-typed function argument, op[argc] will have SImode in
ILP32. Instead of duplicating these RTL patterns to cope with SImode
operand (which e.g. would complicate arm_neon.h), we explicitly convert
the operand to Pmode here; an address operand in a RTL shall have Pmode
anyway. Note that if op[argc] already has DImode,
convert_memory_address will simply return it.
OK for the trunk?
Thanks,
Yufeng
gcc/
* gimple-ssa-strength-reduction.c (backtrace_base_for_ref): Call
get_unwidened and check 'base_in' again.
diff --git a/gcc/gimple-ssa-strength-reduction.c
b/gcc/gimple-ssa-strength-reduction.c
index fea5741..7585164 100644
--- a/gcc/gimple-ssa-strength-reduction.c
+++ b/gcc/gimple-ssa-strength-reduction.c
@@ -769,7 +769,14 @@ backtrace_base_for_ref (tree *pbase)
STRIP_NOPS (base_in);
if (TREE_CODE (base_in) != SSA_NAME)
- return tree_to_double_int (integer_zero_node);
+ {
+ /* Strip of widening conversion(s) to handle cases where
+ e.g. 'B' is widened from an 'int' in order to calculate
+ a 64-bit address. */
+ base_in = get_unwidened (base_in, NULL_TREE);
+ if (TREE_CODE (base_in) != SSA_NAME)
+ return tree_to_double_int (integer_zero_node);
+ }
base_cand = base_cand_from_table (base_in);