On Mon, Jun 17, 2013 at 12:18 PM, Greta Yorsh <greta.yo...@arm.com> wrote: > This patch makes the following changes: > * Define MAX_CONDITIONAL_EXECUTE in arm backend using max_insns_skipped, > which is set based on the current tune. > * Update max_insns_skipped for Cortex-A15 tune to be 2 (instead of 5). > * Use max_insns_skipped in thumb2_final_prescan_insn to decide when to > combine IT blocks > into larger IT blocks. Previously, max_insns_skipped was only used in > arm_final_prescan_insn to decide when branch should be converted to > conditional execution. > > No regression on qemu for arm-none-eabi with cortex-a15 arm/thumb mode. > Bootstrap successful on Cortex-A15. > > Performance improvement on Cortex-A15 in both arm and thumb states on both > Dhrystone and Coremark, and improvement on Spec2000 in thumb state, with all > benchmarks showing improvements except three benchmarks in CFP2000 that have > slight regressions (189,183,178). > > gcc/ChangeLog > > 2013-06-17 Greta Yorsh <greta.yo...@arm.com> > > * config/arm/arm.h (MAX_CONDITIONAL_EXECUTE): Define macro. > * config/arm/arm-protos.h (arm_max_conditional_execute): New > declaration. > (tune_params): Update comment. > * config/arm/arm.c (arm_cortex_a15_tune): Set max_cond_insns to 2. > (arm_max_conditional_execute): New function. > (thumb2_final_prescan_insn): Use max_insn_skipped and > MAX_INSN_PER_IT_BLOCK to compute maximum instructions in a block.
Ok Ramana
