Hi all,

This is the final patch in the series. It adjusts patterns in arm.md that do
arithmetic operations and comparisons. We add alternatives for 16-bit
encodings to the patterns. Some alternatives and patterns are disabled for
arm_restrict_it or their cond_exec variants.

The "Pd" constraint is relaxed to match for any Thumb target, not just Thumb1,
because the 0<= i <=7 range comes in handy in the add and subtract patterns. A
new Pz constraint is created that is needed to define the (rsb rd, rn, #0)
variant of subtraction, the only variant of rsb that can be encoded in 16
bits.


Bootstrapped on a Cortex-A15, tested on model and qemu with ARMv7 and ARMv8
architecture levels.

Ok for trunk?

Thanks,
Kyrill


2013-06-21  Kyrylo Tkachov  <kyrylo.tkac...@arm.com>

        * config/arm/constraints.md (Pd): Allow TARGET_THUMB
        instead of TARGET_THUMB1.
        (Pz): New constraint.
        * config/arm/arm.md (arm_addsi3): Add alternatives for 16-bit
encodings.
        (compare_negsi_si): Likewise.
        (compare_addsi2_op0): Likewise.
        (compare_addsi2_op1): Likewise.
        (addsi3_carryin_<optab>): Likewise.
        (addsi3_carryin_alt2_<optab>): Likewise.
        (addsi3_carryin_shift_<optab>): Disable cond_exec variant
        for arm_restrict_it.
        (subsi3_carryin): Likewise.
        (arm_subsi3_insn): Add alternatives for 16-bit encoding.
        (minmax_arithsi): Disable for arm_restrict_it.
        (minmax_arithsi_non_canon): Adjust for arm_restrict_it.
        (satsi_<SAT:code>): Disable cond_exec variant for arm_restrict_it.
        (satsi_<SAT:code>_shift): Likewise.
        (arm_shiftsi3): Add alternative for 16-bit encoding.
        (arm32_movhf): Disable for arm_restrict_it.
        (arm_cmpdi_unsigned): Add alternatives for 16-bit encoding.
        (arm_movtas_ze): Disable cond_exec variant for arm_restrict_it.

Attachment: 12-final-armmd.patch
Description: Binary data

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