Hey guys,
I'm a first time patch submitter, please be gentle. It probably goes
without saying, but I do not have svn write access.
The patch attached is related to PR38836. This patch removes the
following x86 builtins from the documentation:
__builtin_ia32_cmpnlts *
__builtin_ia32_loadaps
__builtin_ia32_loadddup
__builtin_ia32_loadsss **
__builtin_ia32_movddup
__builtin_ia32_pextrw
__builtin_ia32_pfrsqrtit1
__builtin_ia32_pinsrw
__builtin_ia32_storeaps
__builtin_ia32_storess
* Corrected the spelling of __builtin_ia32_cmpnlts. The suffix should
be "ss", not "s".
** Corrected the spelling of __builtin_ia32_loadss. The suffix should
be "ss", not "sss".
I have run both 'make info' and 'make dvi' also. Although, 'make dvi'
appears to be failing with an unrelated issue in doc/libffi.dvi. I am
assuming that this is a known failure.
-Cameron
Index: gcc/doc/extend.texi
===================================================================
--- gcc/doc/extend.texi (revision 200078)
+++ gcc/doc/extend.texi (working copy)
@@ -9916,8 +9916,6 @@
v4hi __builtin_ia32_pmaxsw (v4hi, v4hi)
v8qi __builtin_ia32_pminub (v8qi, v8qi)
v4hi __builtin_ia32_pminsw (v4hi, v4hi)
-int __builtin_ia32_pextrw (v4hi, int)
-v4hi __builtin_ia32_pinsrw (v4hi, int, int)
int __builtin_ia32_pmovmskb (v8qi)
void __builtin_ia32_maskmovq (v8qi, v8qi, char *)
void __builtin_ia32_movntq (di *, di)
@@ -9965,7 +9963,7 @@
v4si __builtin_ia32_cmpless (v4sf, v4sf)
v4si __builtin_ia32_cmpunordss (v4sf, v4sf)
v4si __builtin_ia32_cmpneqss (v4sf, v4sf)
-v4si __builtin_ia32_cmpnlts (v4sf, v4sf)
+v4si __builtin_ia32_cmpnltss (v4sf, v4sf)
v4si __builtin_ia32_cmpnless (v4sf, v4sf)
v4si __builtin_ia32_cmpordss (v4sf, v4sf)
v4sf __builtin_ia32_maxps (v4sf, v4sf)
@@ -10001,18 +9999,12 @@
The following built-in functions are available when @option{-msse} is used.
@table @code
-@item v4sf __builtin_ia32_loadaps (float *)
-Generates the @code{movaps} machine instruction as a load from memory.
-@item void __builtin_ia32_storeaps (float *, v4sf)
-Generates the @code{movaps} machine instruction as a store to memory.
@item v4sf __builtin_ia32_loadups (float *)
Generates the @code{movups} machine instruction as a load from memory.
@item void __builtin_ia32_storeups (float *, v4sf)
Generates the @code{movups} machine instruction as a store to memory.
-@item v4sf __builtin_ia32_loadsss (float *)
+@item v4sf __builtin_ia32_loadss (float *)
Generates the @code{movss} machine instruction as a load from memory.
-@item void __builtin_ia32_storess (float *, v4sf)
-Generates the @code{movss} machine instruction as a store to memory.
@item v4sf __builtin_ia32_loadhps (v4sf, const v2sf *)
Generates the @code{movhps} machine instruction as a load from memory.
@item v4sf __builtin_ia32_loadlps (v4sf, const v2sf *)
@@ -10196,19 +10188,11 @@
v4sf __builtin_ia32_hsubps (v4sf, v4sf)
v16qi __builtin_ia32_lddqu (char const *)
void __builtin_ia32_monitor (void *, unsigned int, unsigned int)
-v2df __builtin_ia32_movddup (v2df)
v4sf __builtin_ia32_movshdup (v4sf)
v4sf __builtin_ia32_movsldup (v4sf)
void __builtin_ia32_mwait (unsigned int, unsigned int)
@end smallexample
-The following built-in functions are available when @option{-msse3} is used.
-
-@table @code
-@item v2df __builtin_ia32_loadddup (double const *)
-Generates the @code{movddup} machine instruction as a load from memory.
-@end table
-
The following built-in functions are available when @option{-mssse3} is used.
All of them generate the machine instruction that is part of the name
with MMX registers.
@@ -10991,7 +10975,6 @@
v2sf __builtin_ia32_pfrcpit1 (v2sf, v2sf)
v2sf __builtin_ia32_pfrcpit2 (v2sf, v2sf)
v2sf __builtin_ia32_pfrsqrt (v2sf)
-v2sf __builtin_ia32_pfrsqrtit1 (v2sf, v2sf)
v2sf __builtin_ia32_pfsub (v2sf, v2sf)
v2sf __builtin_ia32_pfsubr (v2sf, v2sf)
v2sf __builtin_ia32_pi2fd (v2si)
