Hi,
The following patch fixes an issue with the inline hardware multiply used in
the RL78 G13 target.
The G13 target does not have a multiply instruction, but achieves this using
set of data and control registers.
This patch adds an additional 'nop' after control and data registers are loaded
in the multiply-accumulation operation. Currently, there is only 1 'nop'.
As per the data sheet,
regular multiply operation: 1 nop
multiply-accumulate operation: 2 nops
Section 17.4.2 of G13 hardware manual:
After <6>, the multiply-accumulation operation finishes in one additional
clock cycle. (There is a wait of at least two clock cycles after specifying
the initial settings is finished (<5>).)
Note: The multiplication fails on hardware (for certain testcases), but always
works as expected using rl78-elf-run simulator. I do not think the simulator
has any cycle check for nop's.
Please let me know if this is OK to commit.
Regards,
Kaushik
2013-05-10 Kaushik Phatak <kaushik.pha...@kpitcummins.com>
* config/rl78/rl78.md (mulsi3_g13): Add additional 'nop' required
in multiply-accumulate mode
diff -uprN /home/kpit/fsfsrc/gcc-4.8.0-20121219/gcc/config/rl78/rl78.md
gcc/config/rl78/rl78.md
--- /home/kpit/fsfsrc/gcc-4.8.0-20121219/gcc/config/rl78/rl78.md 2013-01-25
16:26:27.000000000 +0530
+++ gcc/config/rl78/rl78.md 2013-05-10 16:57:26.000000000 +0530
@@ -381,6 +381,7 @@
movw ax, %h2
movw 0xffff2, ax ; MDAH
nop ; mdc += mdal * mdah
+ nop ; Additional nop for MAC
mov a, #0x40
mov !0xf00e8, a ; MDUC
@@ -389,6 +390,7 @@
movw ax, %H2
movw 0xffff2, ax ; MDAH
nop ; mdc += mdal * mdah
+ nop ; Additional nop for MAC
movw ax, !0xf00e0 ; MDCL
movw %H0, ax
; end of mulsi macro"
