[patch, mips] Fix for PR target/56942

[Steve Ellcey]

Andrew Bennett found this fix to my MIPS build problem (PR target/56942).
He does not have write access so I am submitting it for checkin, is this
a simple enough fix for an 'obvious' checkin?  I did a build and regression
test to verify the fix.

Steve Ellcey
sell...@imgtec.com



2013-04-19  Andrew Bennett <andrew.benn...@imgtec.com>
            Steve Ellcey  <sell...@imgtec.com>

        PR target/56942
        * config/mips/mips.md (casesi_internal_mips16_<mode>): Use
        next_active_insn instead of next_real_insn.


diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md
index 2f62910..caf4614 100644
--- a/gcc/config/mips/mips.md
+++ b/gcc/config/mips/mips.md
@@ -6019,7 +6019,7 @@
    (clobber (reg:SI MIPS16_T_REGNUM))]
   "TARGET_MIPS16_SHORT_JUMP_TABLES"
 {
-  rtx diff_vec = PATTERN (next_real_insn (operands[2]));
+  rtx diff_vec = PATTERN (next_active_insn (operands[2]));
 
   gcc_assert (GET_CODE (diff_vec) == ADDR_DIFF_VEC);