Steve Ellcey <steve.ell...@imgtec.com> writes: > From: Maciej W. Rozycki [ma...@codesourcery.com] > >> Steve, would you therefore please do us a favour and check what the AVP >> for MIPS32r2 requires for support of the floating-point MADD instruction >> subset, or preferably, the whole COP1X instruction set? Are these >> instructions only mandatory for a 64-bit FPU (CP1.FIR.F64 == 1), or do >> they have to be included in all FPU implementations > > Maciej, > > I checked with one of the AVP engineers and he said: > > "madd/msub/nmadd/nmsub.fmt instructions are required for all release 2 > implementations, > whether or not that implementation has a 64 bit fpu. They are also > required for mips64 > release 1 implementations. The AVPs check for this."
Steve, thanks for checking. Maciej, in that case, the rest of the patch is OK for 4.9, thanks. Richard
