OK /Marcus
On 4 December 2012 10:36, James Greenhalgh <james.greenha...@arm.com> wrote: > > Hi, > > This patch improves our code generation for some cases of > constant vector permutation. In particular, we are able to > generate better code for patterns which match the output > of the zip, uzp and trn instructions. > > This patch adds support for these cases. > > This patch has been tested with no regressions on > aarch64-none-elf. > > OK to commit? > > Thanks, > James Greenhalgh > > --- > gcc/ > 2012-12-04 James Greenhalgh <james.greenha...@arm.com> > > * config/aarch64/aarch64-simd-builtins.def: Add new builtins. > * config/aarch64/aarch64-simd.md (simd_type): Add uzp. > (aarch64_<PERMUTE:perm_insn><PERMUTE:perm_hilo><mode>): New. > * config/aarch64/aarch64.c (aarch64_evpc_trn): New. > (aarch64_evpc_uzp): Likewise. > (aarch64_evpc_zip): Likewise. > (aarch64_expand_vec_perm_const_1): Check for trn, zip, uzp patterns. > * config/aarch64/iterators.md (unspec): Add neccessary unspecs. > (PERMUTE): New. > (perm_insn): Likewise. > (perm_hilo): Likewise.
