On 12-10-25 3:57 PM, Richard Sandiford wrote:
This patch is an attempt at the routine sketched here:
http://gcc.gnu.org/ml/gcc-patches/2012-10/msg01016.html
for decomposing addresses into constituent parts. It applies
on top of the patches I sent out earlier today. To summarise
that message, the main point is to have an address description
in which we know how the individual parts relate to one another.
If the patch looks OK, I'd like to try doing the same for IRA.
Maybe other passes could use the routines too; I'm not sure.
An alternative to having a generic routine would be to add a target hook.
However, the whole target address interface could do with some clean-up,
so I'd rather not add a new hook until either (a) it becomes absolutely
necessary, because of some target weirdness I don't know about or
(b) there's a coordinated plan to handle things like legitimacy,
base classes, and index classes.
I'm hoping this will help with the x32 problems that HJ is seeing.
Like Vlad, I don't have a set-up to try for certain, but I tried
compiling a set of non-x32 gcc .ii files with -mx32 -maddress-mode=long
and it fixed all but one ICE. It should also fix the problem David found
with SPARC's double-addend LO_SUMs (although it sounds like David has
a workaround for that anyway).
The shortcut in process_address now needs to check explicitly for
autoinc addresses -- like Vlad's original code did -- since the new
structure can have nonnull disps for PRE_MODIFY and POST_MODIFY.
I also tightened the modes used in a couple of places.
It would probably make sense for process_addr_reg to reload SUBREGs
rather than their SUBREG_REGs, since we're unlikely to have paradoxical
subregs (with their undefined bits) in an address, but that's a separate
change.
Tested on x86_64-linux-gnu, no regressions, and no asm changes for a set
of gcc .ii files.
This is really good, Richard. I should have done this from the start (I
tried but failed) and communicated with target maintainers to figure out
the addresses forms (when I failed). I very like mutation notion and
segment. The code has a good educational value too.
I am thinking that pseudo assignment (reg_renumber) could be used to
differ base and index registers too. Although I am not sure it is worth
to do as it creates strange dependencies and that it can help probably
in very rare cases or only for some weird targets. But it is not a
final code probably we will need some changes for porting other targets
to LRA and if we really need this we could return to this.
It is ok for me to commit the patch. I have no power to approve changes
for files outside LRA although I think the place is not important for
approval as LRA now only use it and with the point of LRA the code is
good. But I guess you have the power for changes on RTL side of the
compiler.
Thanks very much, Richard. I thought it will take some time to
implement this but you were very quick.
