Hi,
On 02/09/26 9:45 pm, Surya Kumari Jangala wrote:
Hi,
On 24/08/26 5:16 PM, Manjunath S Matti wrote:
The register order of the two vector arguments to
__builtin_mma_assemble_pair is endian dependent, but the test passes
them in little-endian order unconditionally. On big endian the
accumulator therefore receives the halves of the vector pair transposed
and the computed matrix product does not match the scalar reference, so
the test aborts with "Error 0,0,0".
The explanation above is not really correct. The register order of the two
vector arguments is not endian dependent.
Intuitively, the pair of vsx registers can be considered as a 256-bit value
with the even register having bits 0..127 and the odd register having bits
128..255. When the vector pair is stored to memory, we emit stxvp which will
store the value in an endian appropriate way.
In this testcase, in BE mode, looks like rb[0] holds bits 0..127 while
rb[1] holds bits 128..255. So, we have to pass rb[0] first followed by rb[1].
Thanks for the review, and for the correction. You are right that the
builtin's register order is not itself endian dependent; I have
reworded the commit message and will post the patch again.
Thanks,
Manjunath S Matti.
