> From: Sharma, Dipesh <[email protected]>
> Sent: Monday, August 31, 2026 4:56 PM
>
> AMD General
>
> Hi Haochen,
>
> > From: Haochen Jiang <[email protected]>
> > Sent: 19 August 2026 11:19
> > To: [email protected]
> > diff --git a/gcc/common/config/i386/cpuinfo.h
> > b/gcc/common/config/i386/cpuinfo.h
> > index fef8f90f94c..c63349085c0 100644
> > --- a/gcc/common/config/i386/cpuinfo.h
> > +++ b/gcc/common/config/i386/cpuinfo.h
> > @@ -822,6 +822,7 @@ get_available_features (struct __processor_model
> > *cpu_model,
> > int has_kl = 0;
> > /* Record AVX10 version. */
> > int avx10_set = 0;
> > + int ace_set = 0, avx10v2aux_set = 0;
> > int version = 0;
> > if ((ecx & bit_OSXSAVE))
>
> Since we have XSAVE BSR state as a part of ACE detection algorithm, should
> we also check for OSXSAVE state here just like what exist for AMX ?
>
> <Snip start>
> 1. ( AVX10.1 and AVX10_V1_AUX ) or AVX10.2
> 2. AVX10_V2_AUX
> 3. ACE
> 4. ACE_VSN >= 1
> 5. XCR0[20,18:17] = 0b111 (XSAVE state enabled for tile + BSR)
> 6. XCR0[7:5] = 0b111
> <Snip end>
>
Sure, I suppose the only thing we need to check is BSR. avx10 part
has already checked XCR0[7:5].
> > {
> > @@ -1045,6 +1046,11 @@ get_available_features (struct
> __processor_model
> > *cpu_model,
> > if (edx & bit_AVX10)
> > avx10_set = 1;
> > }
> > + if (avx10_set)
> > + {
> > + if (ecx & bit_ACE)
> > + ace_set = 1;
> > + }
> > if (amx_usable)
> > {
> > if (eax & bit_AMX_FP16)
> > @@ -1143,7 +1149,32 @@ get_available_features (struct
> __processor_model
> > *cpu_model,
> > {
> > __cpuid_count (0x24, 1, eax, ebx, ecx, edx);
> > if (ecx & bit_AVX10V2AUX)
> > - set_feature (FEATURE_AVX10V2AUX);
> > + {
> > + set_feature (FEATURE_AVX10V2AUX);
> > + avx10v2aux_set = 1;
> > + }
> > + }
> > + }
> > +
> > + /* Get Advanced Features at level 0x1d (eax = 0x1d).
> > + ACE check must be put after AVX10 check to get AVX10 features.
> > + TODO: Change the condition after AVX10V1AUX is added. */ if
> > + (version >= 2 && avx10v2aux_set && ace_set && max_cpuid_level >=
> 0x1d)
>
> Should this guard also have ace_usable set after we check for ACE OSXSAVE
> bits?
>
ace_set should have promised ace_usable before. The ace_usable guard should
happen when we set ace_set as 1. I will add it there.
Thx,
Haochen
> > + {
> > + __cpuid_count (0x1d, 0, eax, ebx, ecx, edx);
> > + if (eax == 2)
> > + {
> > + __cpuid_count (0x1d, 2, eax, ebx, ecx, edx);
> > + version = eax & 0xff;
> > + switch (version)
> > + {
> > + case 1:
> > + set_feature (FEATURE_ACEV1);
> > + break;
> > + default:
> > + set_feature (FEATURE_ACEV1);
> > + break;
> > + }
> > }
> > }
> >
>
> Thanks,
> Dipesh
