XCHGB has higher latency than ROLW for non-pentium4 targets, so it
should be avoided. Switch from the preferred_for_size/preferred_for_speed
attributes to the "enabled" attribute to hard-disable unwanted alternatives.
PR target/126433
gcc/ChangeLog:
* config/i386/i386.md (*bswaphi2_movbe): Use enabled attribute.
Remove preferred_for_speed and preferred_for_size attributes.
(*bswaphi2): Ditto.
(bswaphisi2_lowpart): Ditto.
gcc/testsuite/ChangeLog:
* gcc.target/i386/xchg-1.c: Scan for ROL instead of XCHG.
* gcc.target/i386/xchg-2.c: Use -O2 -march=pentium4 to emit XCHG.
Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}.
Uros.
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index f762b2ccea2..230fcb576d0 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -23693,16 +23693,13 @@ (define_insn "*bswaphi2_movbe"
(set_attr "c86_decode" "vector,*,*,*")
(set_attr "bdver1_decode" "double,*,*,*")
(set_attr "mode" "QI,HI,HI,HI")
- (set (attr "preferred_for_size")
- (cond [(eq_attr "alternative" "1")
- (symbol_ref "false")
- ]
- (symbol_ref "true")))
- (set (attr "preferred_for_speed")
- (cond [(eq_attr "alternative" "1")
- (symbol_ref "!TARGET_USE_XCHGB")
+ (set (attr "enabled")
+ (cond [(eq_attr "alternative" "0")
+ (symbol_ref "TARGET_USE_XCHGB")
+ (eq_attr "alternative" "1")
+ (symbol_ref "!TARGET_USE_XCHGB")
]
- (symbol_ref "true")))])
+ (const_string "*")))])
(define_insn "*bswaphi2"
[(set (match_operand:HI 0 "register_operand" "=Q,r")
@@ -23719,16 +23716,13 @@ (define_insn "*bswaphi2"
(set_attr "c86_decode" "vector,*")
(set_attr "bdver1_decode" "double,*")
(set_attr "mode" "QI,HI")
- (set (attr "preferred_for_size")
- (cond [(eq_attr "alternative" "1")
- (symbol_ref "false")
- ]
- (symbol_ref "true")))
- (set (attr "preferred_for_speed")
- (cond [(eq_attr "alternative" "1")
- (symbol_ref "!TARGET_USE_XCHGB")
+ (set (attr "enabled")
+ (cond [(eq_attr "alternative" "0")
+ (symbol_ref "TARGET_USE_XCHGB")
+ (eq_attr "alternative" "1")
+ (symbol_ref "!TARGET_USE_XCHGB")
]
- (symbol_ref "true")))])
+ (const_string "*")))])
(define_insn "bswaphisi2_lowpart"
[(set (match_operand:SI 0 "register_operand" "=Q,r")
@@ -23748,16 +23742,13 @@ (define_insn "bswaphisi2_lowpart"
(set_attr "c86_decode" "vector,*")
(set_attr "bdver1_decode" "double,*")
(set_attr "mode" "QI,HI")
- (set (attr "preferred_for_size")
- (cond [(eq_attr "alternative" "1")
- (symbol_ref "false")
- ]
- (symbol_ref "true")))
- (set (attr "preferred_for_speed")
- (cond [(eq_attr "alternative" "1")
- (symbol_ref "!TARGET_USE_XCHGB")
+ (set (attr "enabled")
+ (cond [(eq_attr "alternative" "0")
+ (symbol_ref "TARGET_USE_XCHGB")
+ (eq_attr "alternative" "1")
+ (symbol_ref "!TARGET_USE_XCHGB")
]
- (symbol_ref "true")))])
+ (const_string "*")))])
(define_expand "bitreverse<mode>2"
[(set (match_operand:SWIDWI 0 "register_operand")
diff --git a/gcc/testsuite/gcc.target/i386/xchg-1.c
b/gcc/testsuite/gcc.target/i386/xchg-1.c
index ea9fc7a8b14..f3e8f84ddf4 100644
--- a/gcc/testsuite/gcc.target/i386/xchg-1.c
+++ b/gcc/testsuite/gcc.target/i386/xchg-1.c
@@ -6,4 +6,4 @@ unsigned short good(unsigned short a)
return (a >> 8 | a << 8);
}
-/* { dg-final { scan-assembler "\[ \t\]xchg" } } */
+/* { dg-final { scan-assembler "\[ \t\]rol" } } */
diff --git a/gcc/testsuite/gcc.target/i386/xchg-2.c
b/gcc/testsuite/gcc.target/i386/xchg-2.c
index f00fb0f2115..9cd02eb310b 100644
--- a/gcc/testsuite/gcc.target/i386/xchg-2.c
+++ b/gcc/testsuite/gcc.target/i386/xchg-2.c
@@ -1,9 +1,9 @@
-/* { dg-do compile } */
-/* { dg-options "-Os" } */
+/* { dg-do compile { target ia32 } } */
+/* { dg-options "-O2 -march=pentium4" } */
unsigned short good(unsigned short a)
{
return (a >> 8 | a << 8);
}
-/* { dg-final { scan-assembler "xchgb" } } */
+/* { dg-final { scan-assembler "\[ \t\]xchg" } } */
