On Tue, Jul 21, 2026 at 1:54 PM Robin Dapp <[email protected]> wrote:
>
> Hi,
>
> This changes the docs to reflect the vectorizer's assumption that
> scatter stores are ordered. Both, scatters and strided stores are
> affected but for strided stores we can version the vectorized loop.
>
> Right now RVV's strided stores are the only ones we emit and those
> are unordered (while there are two variants for the gather/scatter) and
> would require version for runtime strides. If we don't want to always
> version (in case we support a future ordered strided store), we'll
> need to introduce either two optabs like
> mask_len_(un)ordered_strided_store or add a param like bias that can be
> queried. I didn't want to decide for one yet so the patch just
> documents the status quo.
OK.
Thanks,
Richard.
> Regards
> Robin
>
> gcc/ChangeLog:
>
> * doc/md.texi: Document that scatters are left-to-right.
> ---
> gcc/doc/md.texi | 16 ++++++++++------
> 1 file changed, 10 insertions(+), 6 deletions(-)
>
> diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi
> index a98a572cc01..67c036d6bcb 100644
> --- a/gcc/doc/md.texi
> +++ b/gcc/doc/md.texi
> @@ -7439,11 +7439,11 @@ Mask elements @var{i} with @var{i} > (operand 4 +
> operand 5) are ignored.
>
> @mdindex scatter_store@var{m}@var{n}
> @item @samp{scatter_store@var{m}@var{n}}
> -Store a vector of mode @var{m} into several distinct memory locations.
> -Operand 0 is a scalar base address and operand 1 is a vector of mode
> -@var{n} containing offsets from that base. Operand 4 is the vector of
> -values that should be stored, which has the same number of elements as
> -@var{n}. For each element index @var{i}:
> +Store a vector of mode @var{m} into several, not necessarily distinct,
> +memory locations. Operand 0 is a scalar base address and operand 1 is
> +a vector of mode @var{n} containing offsets from that base. Operand 4
> +is the vector of values that should be stored, which has the same number
> +of elements as @var{n}. For each element index @var{i}:
>
> @itemize @bullet
> @item
> @@ -7460,6 +7460,10 @@ store element @var{i} of operand 4 to that address.
> The value of operand 2 does not matter if the offsets are already
> address width.
>
> +If two or more offset elements point to the same location, it is expected
> that
> +the one with the highest element index is being written last. This implies a
> +left-to-right ordering of the store.
> +
> @mdindex mask_scatter_store@var{m}@var{n}
> @item @samp{mask_scatter_store@var{m}@var{n}}
> Like @samp{scatter_store@var{m}@var{n}}, but takes an extra mask operand as
> @@ -7476,7 +7480,7 @@ Mask elements @var{i} with @var{i} > (operand 6 +
> operand 7) are ignored.
>
> @mdindex mask_len_strided_store@var{m}
> @item @samp{mask_len_strided_store@var{m}}
> -Store a vector of mode m into several distinct memory locations.
> +Store a vector of mode m into several, not necessarily distinct, memory
> locations.
> Operand 0 is a scalar base address and operand 1 is scalar stride of Pmode.
> Operand 2 is the vector of values that should be stored, which is of mode
> @var{m}.
> operand 3 is mask operand, operand 4 is length operand and operand 5 is bias
> operand.
> --
> 2.54.0
