Re: [PATCH v3 5/5] RISC-V: Enable macro-fusion pairs for xt-c9501fdvt

[Jeffrey Law]

On 7/19/2026 6:19 AM, Jin Ma wrote:
Enable the following macro-fusion pairs for xt-c9501fdvt:

   RISCV_FUSE_LUI_ADDI
   RISCV_FUSE_AUIPC_ADDI
   RISCV_FUSE_SUB_SEQZ
   RISCV_FUSE_ADD_ANDI
   RISCV_FUSE_ADD_LD
   RISCV_FUSE_ADD_ST
   RISCV_FUSE_ANDI_ADD
   RISCV_FUSE_LOGIC_LOGIC
   RISCV_FUSE_SLLI_SRLI
   RISCV_FUSE_SRLI_ADD
   RISCV_FUSE_PREINDEX_LD
   RISCV_FUSE_PREINDEX_ST
   RISCV_FUSE_POSTINDEX_LD
   RISCV_FUSE_POSTINDEX_ST
   RISCV_FUSE_LDST_PAIR_INC
   RISCV_FUSE_LDST_PAIR_DEC

Leave RISCV_FUSE_FLDFST_PAIR_INC and RISCV_FUSE_FLDFST_PAIR_DEC
disabled for xt-c9501fdvt; they will be enabled for future CPUs.

gcc/ChangeLog:

        * config/riscv/riscv.cc (xt_c9501_tune_info): Enable supported
        fusion pairs.

gcc/testsuite/ChangeLog:

        * gcc.target/riscv/fusion-add-addi-andi.c: Remove the fusion xfail.
        * gcc.target/riscv/fusion-add-ldst.c: Likewise.
        * gcc.target/riscv/fusion-addw-adduw-ldst.c: Likewise.
        * gcc.target/riscv/fusion-andi-add-addi.c: Likewise.
        * gcc.target/riscv/fusion-andi-adduw-rtl.c: Likewise.
        * gcc.target/riscv/fusion-arith-rtl-shapes.c: Likewise.
        * gcc.target/riscv/fusion-c950-lui-auipc.c: Likewise.
        * gcc.target/riscv/fusion-fp-zero-rtl.c: Likewise.
        * gcc.target/riscv/fusion-ldst-pair-dec.c: Likewise.
        * gcc.target/riscv/fusion-ldst-pair-inc.c: Likewise.
        * gcc.target/riscv/fusion-ldst-pair-store-base.c: Likewise.
        * gcc.target/riscv/fusion-load-store-type-rtl.c: Likewise.
        * gcc.target/riscv/fusion-logic-logic-direction-rtl.c: Likewise.
        * gcc.target/riscv/fusion-logic-logic-zbkb.c: Likewise.
        * gcc.target/riscv/fusion-logic-logic.c: Likewise.
        * gcc.target/riscv/fusion-memory-rtl-shapes.c: Likewise.
        * gcc.target/riscv/fusion-memory-subreg-address-rtl.c: Likewise.
        * gcc.target/riscv/fusion-mv-li-andi-rtl.c: Likewise.
        * gcc.target/riscv/fusion-mv-self-rtl.c: Likewise.
        * gcc.target/riscv/fusion-postindex-ldst.c: Likewise.
        * gcc.target/riscv/fusion-postindex-unsigned-load-rtl.c: Likewise.
        * gcc.target/riscv/fusion-preindex-ldst.c: Likewise.
        * gcc.target/riscv/fusion-rv32-fp-losum-rtl.c: Likewise.
        * gcc.target/riscv/fusion-rv32-subreg-positive-rtl.c: Likewise.
        * gcc.target/riscv/fusion-slli-srli.c: Likewise.
        * gcc.target/riscv/fusion-special-positive-rtl.c: Likewise.
        * gcc.target/riscv/fusion-srli-add.c: Likewise.
        * gcc.target/riscv/fusion-sub-seqz-snez.c: Likewise.
        * gcc.target/riscv/fusion-subreg-address-rtl.c: Likewise.
        * gcc.target/riscv/fusion-word-positive-rtl.c: Likewise.
Conceptually OK, though we probably need to wait until we've settled on 
whether or not any of the new cases are duplicates or not of existing 
functionality.  But I don't see anything in here that's worrisome.

jeff