On 12-09-30 2:42 PM, Richard Sandiford wrote:
This is another patch needed for the MIPS MD_REGS change described here:http://gcc.gnu.org/ml/gcc-patches/2012-09/msg01992.html The profitable_hard_regs set used during IRA colouring used to be restricted to registers that are valid for the allocno's mode. That caused problems for multi-register modes that can only start with an even register (say), because profitable_hard_regs would only include the even start registers, not the pairing odd registers. Vlad fixed it with: 2011-04-08 Vladimir Makarov <vmaka...@redhat.com> PR inline-asm/48435 * ira-color.c (setup_profitable_hard_regs): Add comments. Don't take prohibited hard regs into account. (setup_conflict_profitable_regs): Rename to get_conflict_profitable_regs. (check_hard_reg_p): Check prohibited hard regs. However, one effect of that change is that if register R belongs to class CL but can never be used anywhere in a register of mode M, it will still be included in profitable_hard_regs. That's the case with MD_REGS and register HI on MIPS. The patch below is a half-way house between the original behaviour and the post-48435 one. It restricts profitable_hard_regs to registers that can be used for the allocno's mode, but doesn't restrict it to starting registers. Most of the ira.c change is reindentation, so I've included a -b diff as well. As with the patch linked above, I checked that this produced no difference in assembly output for a set of x86_64 gcc .ii files (tested with -O2 -march=native on gcc20). Also tested on x86_64-linux-gnu (including -m32) and mipsisa64-elf. OK to install? gcc/ * ira-int.h (target_ira_int): Add x_ira_useful_class_mode_regs. (ira_useful_class_mode_regs): New macro. * ira.c (clarify_prohibited_class_mode_regs): Set up ira_useful_class_mode_regs. * ira-color.c (setup_profitable_hard_regs): Use it to initialise profitable_hard_regs.
Ok. thanks, Richard.
