The correct expression is ((c &~ a) ^ b). I assume the code is correct if borrowed from the RISC-V port, and only the changelog is incorrect.
On Wed, May 6, 2026 at 4:03 AM Lulu Cheng <[email protected]> wrote: > > > 在 2026/5/2 下午10:49, Xi Ruoyao 写道: > > Copy the a ^ b ^ (a | c) => (a &~ c) ^ b optimization from RISC-V zbb > > (r17-241) as we have the andn instruction in LA64 and LA32S. > > I have a doubt—is this derivation formula written incorrectly? > > if a = 0, b = 0, c = 1 > > a ^ b ^ (a | c) = 0 ^ 0 ^ (0 | 1) = 1 > > (a & ~c) ^ b = (0 & ~1 ) & 0 = 0 > > > > > PR rtl-optimization/96692 > > > > gcc/ > > > > * config/loongarch/loongarch.md (define_split): New splitters > > turning a ^ b ^ (a | c) => (a &~ c) ^ b. > > > > gcc/testsuite/ > > > > * gcc.target/loongarch/pr96692.c: New test. > > --- > > > > Bootstrapped and regtested on loongarch64-linux-gnu. Ok for trunk? > > > > gcc/config/loongarch/loongarch.md | 23 ++++++++++++++++++++ > > gcc/testsuite/gcc.target/loongarch/pr96692.c | 11 ++++++++++ > > 2 files changed, 34 insertions(+) > > create mode 100644 gcc/testsuite/gcc.target/loongarch/pr96692.c > > > > diff --git a/gcc/config/loongarch/loongarch.md > > b/gcc/config/loongarch/loongarch.md > > index 1fea712f668..f3c08b521dd 100644 > > --- a/gcc/config/loongarch/loongarch.md > > +++ b/gcc/config/loongarch/loongarch.md > > @@ -1829,6 +1829,29 @@ (define_insn "*<optab>nsi_internal" > > "<insn>n\t%0,%2,%1" > > [(set_attr "type" "logical") > > (set_attr "mode" "SI")]) > > + > > +(define_split > > + [(set (match_operand:X 0 "register_operand") > > + (xor:X (xor:X (ior:X (match_operand:X 1 "register_operand") > > + (match_operand:X 2 "register_operand")) > > + (match_dup 1)) > > + (match_operand:X 3 "register_operand"))) > > + (clobber (match_operand:X 4 "register_operand"))] > > + "TARGET_64BIT || TARGET_32BIT_S" > > + [(set (match_dup 4) (and:X (not:X (match_dup 1)) (match_dup 2))) > > + (set (match_dup 0) (xor:X (match_dup 4) (match_dup 3)))]) > > + > > +(define_split > > + [(set (match_operand:X 0 "register_operand") > > + (xor:X (xor:X (ior:X (match_operand:X 1 "register_operand") > > + (match_operand:X 2 "register_operand")) > > + (match_dup 2)) > > + (match_operand:X 3 "register_operand"))) > > + (clobber (match_operand:X 4 "register_operand"))] > > + "TARGET_64BIT || TARGET_32BIT_S" > > + [(set (match_dup 4) (and:X (not:X (match_dup 2)) (match_dup 1))) > > + (set (match_dup 0) (xor:X (match_dup 4) (match_dup 3)))]) > > + > > > > ;; > > ;; .................... > > diff --git a/gcc/testsuite/gcc.target/loongarch/pr96692.c > > b/gcc/testsuite/gcc.target/loongarch/pr96692.c > > new file mode 100644 > > index 00000000000..1c2011af264 > > --- /dev/null > > +++ b/gcc/testsuite/gcc.target/loongarch/pr96692.c > > @@ -0,0 +1,11 @@ > > +/* { dg-do compile } */ > > +/* { dg-options "-march=loongarch64 -O" { target lp64 } } */ > > +/* { dg-options "-march=la32v1.0 -O" { target ilp32 } } */ > > + > > +int f(int a, int b, int c) > > +{ > > + return (a ^ b) ^ (a | c); > > +} > > + > > +/* { dg-final { scan-assembler-times "xor\t" 1 } } */ > > +/* { dg-final { scan-assembler-times "andn\t" 1 } } */ >
