From: Pan Li <[email protected]>

This PATCH would like to allow the reg group overlap of v[sz]ext.vf2
for m2.  Take vzext_vf2-u8-0.c as example, we will have before and
after for this PATCH series.

Before:
  vzext.vf2     v30,v16
  vzext.vf2     v28,v15
  vzext.vf2     v26,v14
  vzext.vf2     v24,v13
  vzext.vf2     v22,v12
  vzext.vf2     v20,v11
  vzext.vf2     v18,v10
  vzext.vf2     v16,v9
  vzext.vf2     v14,v8
  vzext.vf2     v12,v7
  vzext.vf2     v10,v6
  vzext.vf2     v8,v5
  vzext.vf2     v6,v4
  vzext.vf2     v4,v3
  vs2r.v        v4,0(sp)
  vzext.vf2     v4,v2
  vzext.vf2     v2,v1

After:
  vzext.vf2     v0,v1
  vzext.vf2     v30,v31
  vzext.vf2     v28,v29
  vzext.vf2     v26,v27
  vzext.vf2     v24,v25
  vzext.vf2     v22,v23
  vzext.vf2     v20,v21
  vzext.vf2     v18,v19
  vzext.vf2     v16,v17
  vzext.vf2     v14,v15
  vzext.vf2     v12,v13
  vzext.vf2     v10,v11
  vzext.vf2     v8,v9
  vzext.vf2     v6,v7
  vzext.vf2     v4,v5
  vzext.vf2     v2,v3

The below test suites are passed for this patch series.
* The rv64gcv fully regression test.

Co-Authored-By: Juzhe-Zhong <[email protected]>
Co-Authored-By: Kito Cheng <[email protected]>

Pan Li (3):
  RISC-V: Allow RVV reg overlap of v[sz]ext.vf2 for m2
  RISC-V: Adjust the testcase due to overlap change.
  RISC-V: Add test cases for v[zs]ext.vf2 reg overlap for m2

 gcc/config/riscv/constraints.md               | 34 ++++++++
 gcc/config/riscv/riscv-protos.h               |  1 +
 gcc/config/riscv/riscv-v.cc                   | 18 +++++
 gcc/config/riscv/riscv.md                     |  3 +
 gcc/config/riscv/vector.md                    | 24 +++---
 .../rvv/autovec/group_overlap/group_overlap.h | 79 +++++++++++++++++++
 .../autovec/group_overlap/vzext_vf2-i16-0.c   | 31 ++++++++
 .../autovec/group_overlap/vzext_vf2-i16-1.c   | 31 ++++++++
 .../autovec/group_overlap/vzext_vf2-i32-0.c   | 31 ++++++++
 .../autovec/group_overlap/vzext_vf2-i32-1.c   | 31 ++++++++
 .../autovec/group_overlap/vzext_vf2-i8-0.c    | 31 ++++++++
 .../autovec/group_overlap/vzext_vf2-i8-1.c    | 31 ++++++++
 .../autovec/group_overlap/vzext_vf2-u16-0.c   | 31 ++++++++
 .../autovec/group_overlap/vzext_vf2-u16-1.c   | 31 ++++++++
 .../autovec/group_overlap/vzext_vf2-u32-0.c   | 31 ++++++++
 .../autovec/group_overlap/vzext_vf2-u32-1.c   | 31 ++++++++
 .../autovec/group_overlap/vzext_vf2-u8-0.c    | 31 ++++++++
 .../autovec/group_overlap/vzext_vf2-u8-1.c    | 31 ++++++++
 .../gcc.target/riscv/rvv/base/pr112431-4.c    |  2 +-
 gcc/testsuite/gcc.target/riscv/rvv/rvv.exp    |  2 +
 20 files changed, 525 insertions(+), 10 deletions(-)
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/group_overlap.h
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-i16-0.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-i16-1.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-i32-0.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-i32-1.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-i8-0.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-i8-1.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u16-0.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u16-1.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u32-0.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u32-1.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u8-0.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u8-1.c

-- 
2.43.0

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