[Patch][AArch64] Expand binary operations' constant operands for neon intrinsics.

[Tejas Belagod]

Hi,
This patch expands an Advanced SIMD intrinsic's operand into a constant operand 
only if the predicate allows it.

Regression-tested on aarch64-none-elf. OK for aarch64-branch?

Thanks,
Tejas Belagod
ARM.

Changelog

2012-09-10  Tejas Belagod  <tejas.bela...@arm.com>

gcc/
        * config/aarch64/aarch64.c (aarch64_simd_expand_builtin): Expand binary
        operations' constant operand only if the predicate allows it.diff --git a/gcc/config/aarch64/aarch64-builtins.c 
b/gcc/config/aarch64/aarch64-builtins.c
index 04cc48a..731f369 100644
--- a/gcc/config/aarch64/aarch64-builtins.c
+++ b/gcc/config/aarch64/aarch64-builtins.c
@@ -1215,13 +1215,17 @@ aarch64_simd_expand_builtin (int fcode, tree exp, rtx 
target)
 
     case AARCH64_SIMD_BINOP:
       {
-       bool op1_const_int_p
-         = CONST_INT_P (expand_normal (CALL_EXPR_ARG (exp, 1)));
-       return aarch64_simd_expand_args (target, icode, 1, exp,
-                                        SIMD_ARG_COPY_TO_REG,
-                                        op1_const_int_p ? SIMD_ARG_CONSTANT
-                                                        : SIMD_ARG_COPY_TO_REG,
-                                        SIMD_ARG_STOP);
+        rtx arg2 = expand_normal (CALL_EXPR_ARG (exp, 1));
+        /* Handle constants only if the predicate allows it.  */
+       bool op1_const_int_p =
+         (CONST_INT_P (arg2)
+          && (*insn_data[icode].operand[2].predicate)
+               (arg2, insn_data[icode].operand[2].mode));
+       return aarch64_simd_expand_args
+         (target, icode, 1, exp,
+          SIMD_ARG_COPY_TO_REG,
+          op1_const_int_p ? SIMD_ARG_CONSTANT : SIMD_ARG_COPY_TO_REG,
+          SIMD_ARG_STOP);
       }
 
     case AARCH64_SIMD_TERNOP: