Relax the logic that prevents TFmode constants being addressed in the
constant pool.
2012-09-06 Marcus Shawcroft <marcus.shawcr...@arm.com>
* config/aarch64/aarch64.c (aarch64_classify_address):
Allow 16 byte modes in constant pool.
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 310c1a0..aa90402 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -2835,9 +2835,7 @@ aarch64_classify_address (struct aarch64_address_info *info,
case LABEL_REF:
/* load literal: pc-relative constant pool entry. */
info->type = ADDRESS_SYMBOLIC;
- if (outer_code != PARALLEL
- && (GET_MODE_SIZE (mode) == 4
- || GET_MODE_SIZE (mode) == 8))
+ if (outer_code != PARALLEL)
{
rtx sym, addend;