[PATCH 2/2] rs6000: Split power8-vector stanza to power8-altivec and power8-vsx..

[Manjunath S Matti]

This patch differentiates the built-ins under stanza power8-vector
into power8-altivec and power8-vsx. It modifies the target test-
case accordingly.

gcc/ChangeLog:

        * config/rs6000/rs6000-builtin.cc (rs6000_builtin_is_supported) : Add
        builtin function supported for the target TARGET_POWER8 && 
TARGET_ALTIVEC.
        (rs6000_invalid_builtin) : Validate appropriate target options being 
set.
        * config/rs6000/rs6000-builtins.def : Split power8-vector stanza into
        power8-altivec and power8-vsx.
        * config/rs6000/rs6000-gen-builtins.cc (bif_stanza) : Add entry
        for BSTZ_P8A.
        (stanza_entry) : Added "power8-altivec" and "power8-vsx".
        (enable_string) : Add ENB_P8A.

gcc/testsuite/ChangeLog:

        * gcc.target/powerpc/pragma_misc9.c : Modify the testcase
        accordingly, now check for -maltivec instead of -mvsx.
---
 gcc/config/rs6000/rs6000-builtin.cc             | 6 ++++++
 gcc/config/rs6000/rs6000-builtins.def           | 7 +++++--
 gcc/config/rs6000/rs6000-gen-builtins.cc        | 6 +++++-
 gcc/testsuite/gcc.target/powerpc/pragma_misc9.c | 2 +-
 4 files changed, 17 insertions(+), 4 deletions(-)

diff --git a/gcc/config/rs6000/rs6000-builtin.cc 
b/gcc/config/rs6000/rs6000-builtin.cc
index 9fe05b97f41..df25c39fdc0 100644
--- a/gcc/config/rs6000/rs6000-builtin.cc
+++ b/gcc/config/rs6000/rs6000-builtin.cc
@@ -102,6 +102,10 @@ rs6000_invalid_builtin (enum rs6000_gen_builtins fncode)
     case ENB_P8:
       error ("%qs requires the %qs option", name, "-mcpu=power8");
       break;
+    case ENB_P8A:
+      error ("%qs requires the %qs and %qs options", name, "-mcpu=power8",
+            "-maltivec");
+      break;
     case ENB_P8V:
       error ("%qs requires the %qs and %qs options", name, "-mcpu=power8",
             "-mvsx");
@@ -166,6 +170,8 @@ rs6000_builtin_is_supported (enum rs6000_gen_builtins 
fncode)
       return TARGET_POPCNTD && TARGET_POWERPC64;
     case ENB_P8:
       return TARGET_POWER8;
+    case ENB_P8A:
+      return TARGET_POWER8 && TARGET_ALTIVEC;
     case ENB_P8V:
       return TARGET_POWER8 && TARGET_VSX;
     case ENB_P9:
diff --git a/gcc/config/rs6000/rs6000-builtins.def 
b/gcc/config/rs6000/rs6000-builtins.def
index 555d7d58950..5bdb89230f2 100644
--- a/gcc/config/rs6000/rs6000-builtins.def
+++ b/gcc/config/rs6000/rs6000-builtins.def
@@ -1853,8 +1853,8 @@
     DIVDEU diveu_di {}
 
 
-; Power8 vector built-ins.
-[power8-vector]
+; Power8 altivec built-ins.
+[power8-altivec]
   const vsll __builtin_altivec_abs_v2di (vsll);
     ABS_V2DI absv2di2 {}
 
@@ -2251,6 +2251,9 @@
   const vui __builtin_crypto_vpmsumw (vui, vui);
     VPMSUMW crypto_vpmsumw {}
 
+
+; Power8 vector built-ins.
+[power8-vsx]
   const vf __builtin_vsx_float2_v2df (vd, vd);
     FLOAT2_V2DF float2_v2df {}
 
diff --git a/gcc/config/rs6000/rs6000-gen-builtins.cc 
b/gcc/config/rs6000/rs6000-gen-builtins.cc
index f77087e0452..9128f3b3b38 100644
--- a/gcc/config/rs6000/rs6000-gen-builtins.cc
+++ b/gcc/config/rs6000/rs6000-gen-builtins.cc
@@ -221,6 +221,7 @@ enum bif_stanza
  BSTZ_P7,
  BSTZ_P7_64,
  BSTZ_P8,
+ BSTZ_P8A,
  BSTZ_P8V,
  BSTZ_P9,
  BSTZ_P9_64,
@@ -255,7 +256,8 @@ static stanza_entry stanza_map[NUMBIFSTANZAS] =
     { "power7",                BSTZ_P7         },
     { "power7-64",     BSTZ_P7_64      },
     { "power8",                BSTZ_P8         },
-    { "power8-vector", BSTZ_P8V        },
+    { "power8-altivec",        BSTZ_P8A        },
+    { "power8-vsx",    BSTZ_P8V        },
     { "power9",                BSTZ_P9         },
     { "power9-64",     BSTZ_P9_64      },
     { "power9-vector", BSTZ_P9V        },
@@ -280,6 +282,7 @@ static const char *enable_string[NUMBIFSTANZAS] =
     "ENB_P7",
     "ENB_P7_64",
     "ENB_P8",
+    "ENB_P8A",
     "ENB_P8V",
     "ENB_P9",
     "ENB_P9_64",
@@ -2239,6 +2242,7 @@ write_decls (void)
   fprintf (header_file, "  ENB_P7,\n");
   fprintf (header_file, "  ENB_P7_64,\n");
   fprintf (header_file, "  ENB_P8,\n");
+  fprintf (header_file, "  ENB_P8A,\n");
   fprintf (header_file, "  ENB_P8V,\n");
   fprintf (header_file, "  ENB_P9,\n");
   fprintf (header_file, "  ENB_P9_64,\n");
diff --git a/gcc/testsuite/gcc.target/powerpc/pragma_misc9.c 
b/gcc/testsuite/gcc.target/powerpc/pragma_misc9.c
index 03e4bf0b31a..e2c59585f47 100644
--- a/gcc/testsuite/gcc.target/powerpc/pragma_misc9.c
+++ b/gcc/testsuite/gcc.target/powerpc/pragma_misc9.c
@@ -28,7 +28,7 @@ vector signed int
 test3 (vector signed int a, vector signed int b)
 {
   return vec_mergee (a, b);
-  /* { dg-error "'__builtin_altivec_vmrgew_v4si' requires the '-mcpu=power8' 
and '-mvsx' options" "" { target *-*-* } .-1 } */
+  /* { dg-error "'__builtin_altivec_vmrgew_v4si' requires the '-mcpu=power8' 
and '-maltivec' options" "" { target *-*-* } .-1 } */
 }
 
 #pragma GCC target ("cpu=power6")
-- 
2.47.3