On 06/09/12 06:41, Bin Cheng wrote: > Hi Richard, > Thanks very much for comments. > >>> Ping? >>> >>> Hi Ramana, could you help me review this patch? >>> Hi Eric, Richard, could you help me review the change in regcprop.c? >> >> Subtraction of zero isn't canonical rtl though. Passes after peephole2 > would >> be well within their rights to simplify the expression back to a move. >> From that point of view, making the passes recognise (plus X 0) and (minus > X 0) >> as special cases would be inconsistent. >> >> Rather than make the Thumb 1 CC usage implicit in the rtl stream, and > carry >> the current state around in cfun->machine, it seems like it would be > better to >> get md_reorg to rewrite the instructions into a form that makes the use of >> condition codes explicit. > > Here is a problem that two versions MOV instruction are supported in Thumb1 > instruction set. The flag-setting version MOV can only take low register > operands, while non-flag-setting version MOV can take high register > operands. So we cannot rewrite non-flag-setting version MOV(with high > register operands) into explicitly flag-setting one, and that's why it is > rewritten into subtract of zero instruction now. > >> >> md_reorg also sounds like a better place in the pipeline than peephole2 to > be >> doing this kind of transformation, although I admit I have zero evidence > to >> back that up... > > Yes, it may be feasible to rewrite the instruction in machine reorg pass, > rather than peephole2. But that need bigger change in ARM back end. > Hi Ramana, Richard, what's your opinion on this? > > Thanks very much. > >
I side with Richard on this one. The mid-end should only have to deal with RTL that's in canonical form. R.
