Hi gcc-patches mailing list, Christophe Lyon <[email protected]> has requested that the following forgejo pull request be published on the mailing list.
Created on: 2025-11-05 13:54:48+00:00 Latest update: 2025-11-05 14:03:53+00:00 Changes: 49 changed files, 1787 additions, 794 deletions Head revision: clyon/gcc-TEST ref MVE-intrinsics-set-get-lane-vpnot-scalar-shifts2 commit 5e79d7cfcafab6853ef2e1d681ba099f264b7384 Base revision: gcc/gcc-TEST ref trunk commit 239535e9b0c4313072dda0ee1dcbd8ad8636a326 r16-4471-g239535e9b0c431 Merge base: 239535e9b0c4313072dda0ee1dcbd8ad8636a326 Full diff url: https://forge.sourceware.org/gcc/gcc-TEST/pulls/121.diff Discussion: https://forge.sourceware.org/gcc/gcc-TEST/pulls/121 Requested Reviewers: This series implements the following MVE intrinsics using the "new" framework: vpnot vgetq_lane vsetq_lane asrl lsll uqrshll uqrshll_sat48 sqrshrl sqrshrl_sat48 sqshll srshrl uqshll urshrl sqrshr sqshl srshr uqrshl uqshl urshr vuninitialized In the process: - also fix the patterns for MVE asrl lsll lsrl, adding support for out-of-range shift amounts - brings back a previous patch to fix support for fp16, needed by vgetq_lane - fixes the remaining vuninitialized instances Sandra, could you please look at the doc change in patch 3/14 ? Changed files: - A: gcc/testsuite/gcc.target/arm/mve/intrinsics/asrl-various-ranges.c - A: gcc/testsuite/gcc.target/arm/mve/intrinsics/lsll-various-ranges.c - A: gcc/testsuite/gcc.target/arm/mve/intrinsics/pr117814-2-f16.c - A: gcc/testsuite/gcc.target/arm/mve/intrinsics/pr117814-2-f32.c - A: gcc/testsuite/gcc.target/arm/mve/intrinsics/pr117814-3-f16.c - A: gcc/testsuite/gcc.target/arm/mve/intrinsics/pr117814-3-f32.c - A: gcc/testsuite/gcc.target/arm/mve/intrinsics/pr117814-4-f16.c - A: gcc/testsuite/gcc.target/arm/mve/intrinsics/pr117814-f16.c - A: gcc/testsuite/gcc.target/arm/mve/intrinsics/pr117814-f32.c - A: gcc/testsuite/gcc.target/arm/mve/intrinsics/sqshl_check_shift.c - A: gcc/testsuite/gcc.target/arm/mve/intrinsics/sqshll_check_shift.c - A: gcc/testsuite/gcc.target/arm/mve/intrinsics/srshr_check_shift.c - A: gcc/testsuite/gcc.target/arm/mve/intrinsics/srshrl_check_shift.c - A: gcc/testsuite/gcc.target/arm/mve/intrinsics/uqshl_check_shift.c - A: gcc/testsuite/gcc.target/arm/mve/intrinsics/uqshll_check_shift.c - A: gcc/testsuite/gcc.target/arm/mve/intrinsics/urshr_check_shift.c - A: gcc/testsuite/gcc.target/arm/mve/intrinsics/urshrl_check_shift.c - A: gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f16_bounds.c - A: gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f32_bounds.c - A: gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s16_bounds.c - A: gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s32_bounds.c - A: gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s64_bounds.c - A: gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s8_bounds.c - A: gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u16_bounds.c - A: gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u32_bounds.c - A: gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u64_bounds.c - A: gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u8_bounds.c - D: gcc/testsuite/gcc.target/arm/fp16-compile-none-1.c - M: gcc/config/arm/arm-builtins.cc - M: gcc/config/arm/arm-mve-builtins-base.cc - M: gcc/config/arm/arm-mve-builtins-base.def - M: gcc/config/arm/arm-mve-builtins-base.h - M: gcc/config/arm/arm-mve-builtins-shapes.cc - M: gcc/config/arm/arm-mve-builtins-shapes.h - M: gcc/config/arm/arm-mve-builtins.cc - M: gcc/config/arm/arm-mve-builtins.h - M: gcc/config/arm/arm-opts.h - M: gcc/config/arm/arm.cc - M: gcc/config/arm/arm.md - M: gcc/config/arm/arm.opt - M: gcc/config/arm/arm_mve.h - M: gcc/config/arm/arm_mve_types.h - M: gcc/config/arm/constraints.md - M: gcc/config/arm/mve.md - M: gcc/config/arm/thumb2.md - M: gcc/doc/extend.texi - M: gcc/doc/sourcebuild.texi - M: gcc/testsuite/g++.target/arm/mve/general-c++/nomve_fp_1.c - M: gcc/testsuite/lib/target-supports.exp Christophe Lyon (14): arm: [MVE intrinsics] rework vpnot arm: [MVE intrinsics] Avoid warnings when floating-point is not supported [PR 117814] arm: doc: Update documentation on half-precision support arm: [MVE intrinsics] rework vgetq_lane vsetq_lane arm: fix MVE asrl lsll lsrl patterns [PR122216] arm: add support for out of range shift amount in MVE asrl and lsll [PR122216] arm: [MVE intrinsics] add scalar_s64_shift scalar_u64_shift shapes [PR122216] arm: [MVE intrinsics] rework asrl lsll [PR122216] arm: [MVE intrinsics] rework uqrshll uqrshll_sat48 arm: [MVE intrinsics] rework sqrshrl sqrshrl_sat48 arm: [MVE intrinsics] rework sqshll srshrl uqshll urshrl arm: [MVE intrinsics] rework sqrshr sqshl srshr uqrshl uqshl urshr arm: [MVE intrinsics] rework vuninitialized arm: [MVE intrinsics] remove __ARM_mve_coerce in arm_mve.h gcc/config/arm/arm-builtins.cc | 4 +- gcc/config/arm/arm-mve-builtins-base.cc | 205 ++++++ gcc/config/arm/arm-mve-builtins-base.def | 23 + gcc/config/arm/arm-mve-builtins-base.h | 19 + gcc/config/arm/arm-mve-builtins-shapes.cc | 289 +++++++- gcc/config/arm/arm-mve-builtins-shapes.h | 12 + gcc/config/arm/arm-mve-builtins.cc | 32 +- gcc/config/arm/arm-mve-builtins.h | 1 + gcc/config/arm/arm-opts.h | 1 + gcc/config/arm/arm.cc | 14 +- gcc/config/arm/arm.md | 17 +- gcc/config/arm/arm.opt | 2 +- gcc/config/arm/arm_mve.h | 660 +----------------- gcc/config/arm/arm_mve_types.h | 2 - gcc/config/arm/constraints.md | 5 +- gcc/config/arm/mve.md | 212 +++++- gcc/config/arm/thumb2.md | 24 - gcc/doc/extend.texi | 112 +-- gcc/doc/sourcebuild.texi | 6 + .../arm/mve/general-c++/nomve_fp_1.c | 2 +- .../gcc.target/arm/fp16-compile-none-1.c | 7 - .../arm/mve/intrinsics/asrl-various-ranges.c | 161 +++++ .../arm/mve/intrinsics/lsll-various-ranges.c | 160 +++++ .../arm/mve/intrinsics/pr117814-2-f16.c | 30 + .../arm/mve/intrinsics/pr117814-2-f32.c | 30 + .../arm/mve/intrinsics/pr117814-3-f16.c | 21 + .../arm/mve/intrinsics/pr117814-3-f32.c | 21 + .../arm/mve/intrinsics/pr117814-4-f16.c | 23 + .../arm/mve/intrinsics/pr117814-f16.c | 22 + .../arm/mve/intrinsics/pr117814-f32.c | 22 + .../arm/mve/intrinsics/sqshl_check_shift.c | 24 + .../arm/mve/intrinsics/sqshll_check_shift.c | 24 + .../arm/mve/intrinsics/srshr_check_shift.c | 24 + .../arm/mve/intrinsics/srshrl_check_shift.c | 24 + .../arm/mve/intrinsics/uqshl_check_shift.c | 24 + .../arm/mve/intrinsics/uqshll_check_shift.c | 24 + .../arm/mve/intrinsics/urshr_check_shift.c | 24 + .../arm/mve/intrinsics/urshrl_check_shift.c | 24 + .../mve/intrinsics/vsetq_lane_f16_bounds.c | 19 + .../mve/intrinsics/vsetq_lane_f32_bounds.c | 19 + .../mve/intrinsics/vsetq_lane_s16_bounds.c | 19 + .../mve/intrinsics/vsetq_lane_s32_bounds.c | 19 + .../mve/intrinsics/vsetq_lane_s64_bounds.c | 19 + .../arm/mve/intrinsics/vsetq_lane_s8_bounds.c | 19 + .../mve/intrinsics/vsetq_lane_u16_bounds.c | 19 + .../mve/intrinsics/vsetq_lane_u32_bounds.c | 19 + .../mve/intrinsics/vsetq_lane_u64_bounds.c | 19 + .../arm/mve/intrinsics/vsetq_lane_u8_bounds.c | 19 + gcc/testsuite/lib/target-supports.exp | 54 ++ 49 files changed, 1784 insertions(+), 791 deletions(-) delete mode 100644 gcc/testsuite/gcc.target/arm/fp16-compile-none-1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/asrl-various-ranges.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/lsll-various-ranges.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/pr117814-2-f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/pr117814-2-f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/pr117814-3-f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/pr117814-3-f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/pr117814-4-f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/pr117814-f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/pr117814-f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/sqshl_check_shift.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/sqshll_check_shift.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/srshr_check_shift.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/srshrl_check_shift.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/uqshl_check_shift.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/uqshll_check_shift.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/urshr_check_shift.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/urshrl_check_shift.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f16_bounds.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f32_bounds.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s16_bounds.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s32_bounds.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s64_bounds.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s8_bounds.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u16_bounds.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u32_bounds.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u64_bounds.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u8_bounds.c -- 2.51.1
