[SPARC] Make target-specific tests more robust

[Eric Botcazou]

The tests need to accept both branch directions.

Tested on SPARC64/Solaris, applied on the mainline.


2025-11-02  Eric Botcazou  <ebotca...@adacore.com>

        * gcc.target/sparc/cbcond-1.c: Accept reverse branches.
        * gcc.target/sparc/cbcond-2.c: Likewise.
        * gcc.target/sparc/overflow-3.c: Likewise.
        * gcc.target/sparc/overflow-4.c: Likewise.
        * gcc.target/sparc/overflow-5.c: Likewise.

-- 
Eric Botcazou
diff --git a/gcc/testsuite/gcc.target/sparc/cbcond-1.c b/gcc/testsuite/gcc.target/sparc/cbcond-1.c
index 74fe475a6c5..742ab1d11ac 100644
--- a/gcc/testsuite/gcc.target/sparc/cbcond-1.c
+++ b/gcc/testsuite/gcc.target/sparc/cbcond-1.c
@@ -34,5 +34,5 @@ void cbcondle (int a)
 
 /* { dg-final { scan-assembler "cwbe\t%"  { target ilp32 } } } */
 /* { dg-final { scan-assembler "cwbne\t%" { target ilp32 } } } */
-/* { dg-final { scan-assembler "cwbl\t%"  } } */
-/* { dg-final { scan-assembler "cwble\t%" } } */
+/* { dg-final { scan-assembler "cwbl|cwbge\t%"  } } */
+/* { dg-final { scan-assembler "cwble|cwbg\t%" } } */
diff --git a/gcc/testsuite/gcc.target/sparc/cbcond-2.c b/gcc/testsuite/gcc.target/sparc/cbcond-2.c
index da6c617b4e4..c55f9e998dd 100644
--- a/gcc/testsuite/gcc.target/sparc/cbcond-2.c
+++ b/gcc/testsuite/gcc.target/sparc/cbcond-2.c
@@ -35,5 +35,5 @@ void cbcondle (long a)
 
 /* { dg-final { scan-assembler "cxbe\t%"  } } */
 /* { dg-final { scan-assembler "cxbne\t%" } } */
-/* { dg-final { scan-assembler "cxbl\t%"  } } */
-/* { dg-final { scan-assembler "cxble\t%" } } */
+/* { dg-final { scan-assembler "cxbl|cxbge\t%"  } } */
+/* { dg-final { scan-assembler "cxble|cxbg\t%" } } */
diff --git a/gcc/testsuite/gcc.target/sparc/overflow-3.c b/gcc/testsuite/gcc.target/sparc/overflow-3.c
index 52d6ab2b688..ce52de0f1b6 100644
--- a/gcc/testsuite/gcc.target/sparc/overflow-3.c
+++ b/gcc/testsuite/gcc.target/sparc/overflow-3.c
@@ -38,6 +38,6 @@ bool my_neg_overflow (int32_t a, int32_t *res)
 /* { dg-final { scan-assembler-times "addcc\t%" 2 } } */
 /* { dg-final { scan-assembler-times "subcc\t%" 4 } } */
 /* { dg-final { scan-assembler-times "addx\t%" 3 } } */
-/* { dg-final { scan-assembler-times "bvs" 3 } } */
+/* { dg-final { scan-assembler-times "bvs|bvc" 3 } } */
 /* { dg-final { scan-assembler-not "cmp\t%" } } */
 /* { dg-final { scan-assembler-not "save\t%" } } */
diff --git a/gcc/testsuite/gcc.target/sparc/overflow-4.c b/gcc/testsuite/gcc.target/sparc/overflow-4.c
index c6121b958c3..2b62edf0b1c 100644
--- a/gcc/testsuite/gcc.target/sparc/overflow-4.c
+++ b/gcc/testsuite/gcc.target/sparc/overflow-4.c
@@ -38,7 +38,7 @@ bool my_neg_overflow (int64_t a, int64_t *res)
 /* { dg-final { scan-assembler-times "addcc\t%" 2 } } */
 /* { dg-final { scan-assembler-times "subcc\t%" 4 } } */
 /* { dg-final { scan-assembler-times "movlu\t%" 1 } } */
-/* { dg-final { scan-assembler-times "blu" 2 } } */
-/* { dg-final { scan-assembler-times "bvs" 3 } } */
+/* { dg-final { scan-assembler-times "blu|bgeu" 2 } } */
+/* { dg-final { scan-assembler-times "bvs|bvc" 3 } } */
 /* { dg-final { scan-assembler-not "cmp\t%" } } */
 /* { dg-final { scan-assembler-not "save\t%" } } */
diff --git a/gcc/testsuite/gcc.target/sparc/overflow-5.c b/gcc/testsuite/gcc.target/sparc/overflow-5.c
index f00283f6e7b..0459a650e7a 100644
--- a/gcc/testsuite/gcc.target/sparc/overflow-5.c
+++ b/gcc/testsuite/gcc.target/sparc/overflow-5.c
@@ -38,6 +38,6 @@ bool my_neg_overflow (int64_t a, int64_t *res)
 /* { dg-final { scan-assembler-times "addcc\t%" 2 } } */
 /* { dg-final { scan-assembler-times "subcc\t%" 4 } } */
 /* { dg-final { scan-assembler-times "addxc\t%" 3 } } */
-/* { dg-final { scan-assembler-times "bvs" 3 } } */
+/* { dg-final { scan-assembler-times "bvs|bvc" 3 } } */
 /* { dg-final { scan-assembler-not "cmp\t%" } } */
 /* { dg-final { scan-assembler-not "save\t%" } } */