Re: [PATCH v5 2/2] RISC-V: Allow VLS types using up to LMUL 8

[Robin Dapp]

There are still a few (5) testsuite failures, though. It looks like most of them are similar, latent and due to us not handling small VLS BImodes properly. Maybe we still need

diff --git a/gcc/config/riscv/riscv-v.cc b/gcc/config/riscv/riscv-v.cc
index d2edffb36a2..d2d99b828ac 100644
--- a/gcc/config/riscv/riscv-v.cc
+++ b/gcc/config/riscv/riscv-v.cc
@@ -2220,7 +2220,7 @@ get_vector_mode (scalar_mode inner_mode, poly_uint64 
nunits)
     if (inner_mode == GET_MODE_INNER (mode)
        && known_eq (nunits, GET_MODE_NUNITS (mode))
        && (riscv_v_ext_vector_mode_p (mode)
-           || riscv_v_ext_vls_mode_p (mode)))
+           || (riscv_v_ext_vls_mode_p (mode) && vls_mode_valid_p (mode))))
       return mode;
   return opt_machine_mode ();
 }

With the hunk above on top of the patch (and obviously
+     && (!riscv_v_ext_vls_mode_p (vmode) || vls_mode_valid_p (vmode))
removed again) the test suite is unchanged for me.

--
Regards
Robin