From: Andi Kleen <a...@gcc.gnu.org>
Make the expand pattern for operand 1 match the final instruction.
PR 121658
gcc/ChangeLog:
* config/i386/sse.md ("<insn><mode>3"): Use
register_operand for rotate patterns.
gcc/testsuite/ChangeLog:
* gcc.target/i386/pr121658.c: New test.
---
gcc/config/i386/sse.md | 2 +-
gcc/testsuite/gcc.target/i386/pr121658.c | 4 ++++
2 files changed, 5 insertions(+), 1 deletion(-)
create mode 100644 gcc/testsuite/gcc.target/i386/pr121658.c
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 951ee54589f3..e011f8fe47fa 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -27021,7 +27021,7 @@ (define_expand "cond_<insn><mode>"
(define_expand "<insn><mode>3"
[(set (match_operand:VI1_AVX512_3264 0 "register_operand")
(any_rotate:VI1_AVX512_3264
- (match_operand:VI1_AVX512_3264 1 "general_operand")
+ (match_operand:VI1_AVX512_3264 1 "register_operand")
(match_operand:SI 2 "const_int_operand")))]
"TARGET_GFNI"
{
diff --git a/gcc/testsuite/gcc.target/i386/pr121658.c
b/gcc/testsuite/gcc.target/i386/pr121658.c
new file mode 100644
index 000000000000..5fe54601e72f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr121658.c
@@ -0,0 +1,4 @@
+/* { dg-do compile } */
+/* { dg-options "-mgfni -mavx512f -O" } */
+__attribute__((__vector_size__(64))) unsigned char v;
+void foo() { v = (v << 7) | (v >> 1); }
--
2.49.0
