Hi Keith, > This option (enabled by default) preserves existing behavior by > allowing use of Advanced SIMD registers while expanding > memset/memcpy/memmove operations into inline instructions. > > Disabling this option prevents use of these registers for environments > where the FPU may be disabled to reduce the cost of saving/restoring > the processor state, such as in interrupt handlers. > > The second patch in this series disables this option by default for > aarch64*-*-elf targets as those are often used for embedded systems > with interrupt handlers.
I don't see how this makes any sense. If TARGET_SIMD or TARGET_FP are true, the compiler may at any time use a SIMD register for anything - including in integer-only code. And making it the default for embedded targets would make code slower&larger for everybody - I don't see how that could be justified given that interrupt handlers always need special consideration anyway and represent a tiny fraction of all code... AArch64 has -mgeneral-regs-only which does exactly what you want, so any interrupt code can be built using that. Cheers, Wilco
