From: Pan Li <pan2...@intel.com> This patch would like to introduce the combine of vec_dup + vmerge.vv into vmerge.vx on the cost value of GR2VR. The late-combine will take place if the cost of GR2VR is zero, or reject the combine if non-zero like 1, 2, 15 in test.
From: | ... | vmv.v.x | L1: | vaadd.vv | J L1 | ... To: | ... | L1: | vmerge.vxm | J L1 | ... The below test suites are passed for this patch series. * The rv64gcv fully regression test. Pan Li (2): RISC-V: Combine vec_duplicate + vmerge.vv to vmerge.vx on GR2VR cost RISC-V: RISC-V: Add test for vec_duplicate + vmerge.vvm combine with GR2VR cost 0, 1 and 15 gcc/config/riscv/autovec-opt.md | 18 ++ gcc/config/riscv/riscv.cc | 39 +++- .../riscv/rvv/autovec/vx_vf/vx-merge-1-i16.c | 10 + .../riscv/rvv/autovec/vx_vf/vx-merge-1-i32.c | 10 + .../riscv/rvv/autovec/vx_vf/vx-merge-1-i64.c | 10 + .../riscv/rvv/autovec/vx_vf/vx-merge-1-i8.c | 10 + .../riscv/rvv/autovec/vx_vf/vx-merge-2-i16.c | 10 + .../riscv/rvv/autovec/vx_vf/vx-merge-2-i32.c | 10 + .../riscv/rvv/autovec/vx_vf/vx-merge-2-i64.c | 10 + .../riscv/rvv/autovec/vx_vf/vx-merge-2-i8.c | 10 + .../riscv/rvv/autovec/vx_vf/vx-merge-3-i16.c | 10 + .../riscv/rvv/autovec/vx_vf/vx-merge-3-i32.c | 10 + .../riscv/rvv/autovec/vx_vf/vx-merge-3-i64.c | 10 + .../riscv/rvv/autovec/vx_vf/vx-merge-3-i8.c | 10 + .../riscv/rvv/autovec/vx_vf/vx_binary.h | 22 ++ .../riscv/rvv/autovec/vx_vf/vx_binary_data.h | 196 ++++++++++++++++++ .../rvv/autovec/vx_vf/vx_vmerge-run-1-i16.c | 15 ++ .../rvv/autovec/vx_vf/vx_vmerge-run-1-i32.c | 15 ++ .../rvv/autovec/vx_vf/vx_vmerge-run-1-i64.c | 15 ++ .../rvv/autovec/vx_vf/vx_vmerge-run-1-i8.c | 15 ++ 20 files changed, 446 insertions(+), 9 deletions(-) create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-merge-1-i16.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-merge-1-i32.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-merge-1-i64.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-merge-1-i8.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-merge-2-i16.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-merge-2-i32.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-merge-2-i64.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-merge-2-i8.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-merge-3-i16.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-merge-3-i32.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-merge-3-i64.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-merge-3-i8.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vmerge-run-1-i16.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vmerge-run-1-i32.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vmerge-run-1-i64.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vmerge-run-1-i8.c -- 2.43.0
