SSE_FIRST_REG was added to CLASS_LIKELY_SPILLED_P, which became TARGET_CLASS_LIKELY_SPILLED_P, for
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=40470 Since RA has been improved and xmm0 is a commonly used register, remove SSE_FIRST_REG from ix86_class_likely_spilled_p to improve xmm0 codegen: 1. Scan vpermt2w/vpermt2b instead of vpermi2w/vpermi2b in some tests. 2. Don't force register in ix86_expand_ternlog to avoid FAIL: gcc.target/i386/pr100711-6.c scan-assembler-times vpternlog[dq][ \\t]+\\$0x55, \\(%(?:eax|rdi|edi)\\)\\{1to[1-8]+\\} 2 with -m32. gcc/ PR target/119083 * config/i386/i386.cc (ix86_expand_ternlog): Don't force register in 32-bit mode. (ix86_class_likely_spilled_p): Remove SSE_FIRST_REG. gcc/testsuite/ PR target/119083 * gcc.target/i386/avx512bw-extendbf2sf.c: Scan vpermt2w instead of vpermi2w. * gcc.target/i386/avx512fp16-builtin_shuffle-1.c: Likewise. * gcc.target/i386/vpermt2-special-bf16-shufflue.c: Likewise. * gcc.target/i386/pr101846-4.c: Scan vpermt2b instead of vpermi2b. Signed-off-by: H.J. Lu <hjl.to...@gmail.com> --- gcc/config/i386/i386-expand.cc | 7 ------- gcc/config/i386/i386.cc | 1 - gcc/testsuite/gcc.target/i386/avx512bw-extendbf2sf.c | 2 +- .../gcc.target/i386/avx512fp16-builtin_shuffle-1.c | 3 +-- gcc/testsuite/gcc.target/i386/pr101846-4.c | 2 +- .../gcc.target/i386/vpermt2-special-bf16-shufflue.c | 2 +- 6 files changed, 4 insertions(+), 13 deletions(-) diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc index 388e65192e4..0bf6522c70f 100644 --- a/gcc/config/i386/i386-expand.cc +++ b/gcc/config/i386/i386-expand.cc @@ -26641,13 +26641,6 @@ ix86_expand_ternlog (machine_mode mode, rtx op0, rtx op1, rtx op2, int idx, { if (GET_MODE (op2) != mode) op2 = gen_lowpart (mode, op2); - if (!TARGET_64BIT && !register_operand (op2, mode)) - { - /* Avoid force_reg (mode, op2). */ - rtx reg = gen_reg_rtx (mode); - emit_move_insn (reg, op2); - op2 = reg; - } emit_move_insn (target, gen_rtx_XOR (mode, op2, CONSTM1_RTX (mode))); return target; } diff --git a/gcc/config/i386/i386.cc b/gcc/config/i386/i386.cc index a123fe9992f..fcdfb3f1f5c 100644 --- a/gcc/config/i386/i386.cc +++ b/gcc/config/i386/i386.cc @@ -20761,7 +20761,6 @@ ix86_class_likely_spilled_p (reg_class_t rclass) case AD_REGS: case SIREG: case DIREG: - case SSE_FIRST_REG: case FP_TOP_REG: case FP_SECOND_REG: return true; diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-extendbf2sf.c b/gcc/testsuite/gcc.target/i386/avx512bw-extendbf2sf.c index e7c65b7ee01..8e672ac714c 100644 --- a/gcc/testsuite/gcc.target/i386/avx512bw-extendbf2sf.c +++ b/gcc/testsuite/gcc.target/i386/avx512bw-extendbf2sf.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-mavx512bw -mavx512vl -O2 -ffast-math" } */ -/* { dg-final { scan-assembler-times {(?n)(?:vpermi2w|vpunpcklwd)} 6 } } */ +/* { dg-final { scan-assembler-times {(?n)(?:vpermt2w|vpunpcklwd)} 6 } } */ typedef float v4sf __attribute__((vector_size(16))); typedef float v8sf __attribute__((vector_size(32))); diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-builtin_shuffle-1.c b/gcc/testsuite/gcc.target/i386/avx512fp16-builtin_shuffle-1.c index 89d3567a66b..3b9954e101d 100644 --- a/gcc/testsuite/gcc.target/i386/avx512fp16-builtin_shuffle-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512fp16-builtin_shuffle-1.c @@ -1,10 +1,9 @@ /* { dg-do compile } */ /* { dg-options "-mavx512fp16 -mavx512vl -O2" } */ /* { dg-final { scan-assembler-not "movw" } } */ -/* { dg-final { scan-assembler-times "vpermi2w" 3 } } */ /* { dg-final { scan-assembler-times "vpermw" 6 } } */ /* { dg-final { scan-assembler-times "vpshufb" 3 } } */ -/* { dg-final { scan-assembler-times "vpermt2w" 6 } } */ +/* { dg-final { scan-assembler-times "vpermt2w" 9 } } */ typedef _Float16 v32hf __attribute__((vector_size (64))); typedef _Float16 v16hf __attribute__((vector_size (32))); diff --git a/gcc/testsuite/gcc.target/i386/pr101846-4.c b/gcc/testsuite/gcc.target/i386/pr101846-4.c index 2a6163c4d72..a74aad9a78e 100644 --- a/gcc/testsuite/gcc.target/i386/pr101846-4.c +++ b/gcc/testsuite/gcc.target/i386/pr101846-4.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-mavx512vl -mavx512vbmi -O2" } */ -/* { dg-final { scan-assembler-times "vpermi2b" "3" } } */ +/* { dg-final { scan-assembler-times "vpermt2b" "3" } } */ typedef char v16qi __attribute__((vector_size (16))); typedef char v32qi __attribute__((vector_size (32))); diff --git a/gcc/testsuite/gcc.target/i386/vpermt2-special-bf16-shufflue.c b/gcc/testsuite/gcc.target/i386/vpermt2-special-bf16-shufflue.c index e504f3f4cd7..24861584896 100644 --- a/gcc/testsuite/gcc.target/i386/vpermt2-special-bf16-shufflue.c +++ b/gcc/testsuite/gcc.target/i386/vpermt2-special-bf16-shufflue.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O2 -mavx512bf16 -mavx512vl" } */ -/* { dg-final { scan-assembler-times "vpermi2w" 3 } } */ +/* { dg-final { scan-assembler-times "vpermt2w" 3 } } */ typedef __bf16 v8bf __attribute__((vector_size(16))); typedef __bf16 v16bf __attribute__((vector_size(32))); -- 2.49.0
