From: Pan Li <pan2...@intel.com> This patch series would like to introudce the vec_dup + vadd.vv combine to vadd.vx, based on the cost of the GR2VR. For example as below.
v1 = vec_dup(x2) v2 = vec_add_vv(v3, v1) will be optimized to below in late-combine v2 = vec_add_vx(v3, x3) If and only if the cost of (vec_dup + vec_add_vv) is greater than the cost of vec_add_vx. Pan Li (3): RISC-V: Combine vec_duplicate + vadd.vv to vadd.vx on GR2VR cost RISC-V: Adjust the testcases after vec_duplicate + vadd.vv combine RISC-V: Add testcases for vec_duplicate + vadd.vv combine to vadd.vx gcc/config/riscv/autovec-opt.md | 22 + gcc/config/riscv/riscv.cc | 26 +- gcc/config/riscv/vector-iterators.md | 4 + .../rvv/autovec/binop/vadd-rv32gcv-nofm.c | 3 +- .../riscv/rvv/autovec/binop/vadd-rv32gcv.c | 3 +- .../rvv/autovec/binop/vadd-rv64gcv-nofm.c | 3 +- .../riscv/rvv/autovec/binop/vadd-rv64gcv.c | 3 +- .../riscv/rvv/autovec/vx_vf/vx_binary.h | 17 + .../riscv/rvv/autovec/vx_vf/vx_binary_data.h | 401 ++++++++++++++++++ .../riscv/rvv/autovec/vx_vf/vx_binary_run.h | 26 ++ .../riscv/rvv/autovec/vx_vf/vx_vadd-1-i16.c | 8 + .../riscv/rvv/autovec/vx_vf/vx_vadd-1-i32.c | 8 + .../riscv/rvv/autovec/vx_vf/vx_vadd-1-i64.c | 8 + .../riscv/rvv/autovec/vx_vf/vx_vadd-1-i8.c | 8 + .../riscv/rvv/autovec/vx_vf/vx_vadd-1-u16.c | 8 + .../riscv/rvv/autovec/vx_vf/vx_vadd-1-u32.c | 8 + .../riscv/rvv/autovec/vx_vf/vx_vadd-1-u64.c | 8 + .../riscv/rvv/autovec/vx_vf/vx_vadd-1-u8.c | 8 + .../rvv/autovec/vx_vf/vx_vadd-run-1-i16.c | 14 + .../rvv/autovec/vx_vf/vx_vadd-run-1-i32.c | 14 + .../rvv/autovec/vx_vf/vx_vadd-run-1-i64.c | 14 + .../rvv/autovec/vx_vf/vx_vadd-run-1-i8.c | 14 + .../rvv/autovec/vx_vf/vx_vadd-run-1-u16.c | 14 + .../rvv/autovec/vx_vf/vx_vadd-run-1-u32.c | 14 + .../rvv/autovec/vx_vf/vx_vadd-run-1-u64.c | 14 + .../rvv/autovec/vx_vf/vx_vadd-run-1-u8.c | 14 + gcc/testsuite/gcc.target/riscv/rvv/rvv.exp | 2 + .../gcc.target/riscv/struct_vect_24.c | 6 +- 28 files changed, 679 insertions(+), 13 deletions(-) create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary.h create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_data.h create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_run.h create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-i16.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-i32.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-i64.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-i8.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u16.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u32.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u64.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u8.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i16.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i32.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i64.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i8.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u16.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u32.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u64.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u8.c -- 2.43.0
