Hello! > Bootstrapped and tested on i686-linux. It's also been in several of our > internal trees, going back to even 4.4-based ones IIRC, and has had > testing for several architectures. Ok for the i386 part? I intend to > check the reload bits in soon if there are no objections.
Index: gcc/config/i386/i386.h =================================================================== --- gcc/config/i386/i386.h (revision 189284) +++ gcc/config/i386/i386.h (working copy) @@ -1376,7 +1376,8 @@ enum reg_class ((MODE) == QImode && !TARGET_64BIT \ && ((CLASS) == ALL_REGS || (CLASS) == GENERAL_REGS \ || (CLASS) == LEGACY_REGS || (CLASS) == INDEX_REGS) \ - ? Q_REGS : (CLASS)) + ? Q_REGS \ + : (CLASS) == INT_SSE_REGS ? GENERAL_REGS : (CLASS)) /* If we are copying between general and FP registers, we need a memory location. The same is true for SSE and MMX registers. */ Is this correctness or performance issue? SSE regs can hold SImode or DImode values, so it looks to me that this limitation is true only for QI and HI modes. Can you perhaps explain the reason for this limitation a bit more? Uros.