[PATCH] RISC-V: Tweak testcase for PIE

Kito Cheng Mon, 31 Mar 2025 20:11:19 -0700

Linux toolchain may configured with --enable-default-pie, and that will
cause lots of regression test failures because the function name will
append with @plt suffix (e.g. `call foo` become `call foo@plt`).


We may consider just drop @plt suffix to prevent that at all, because
it's not difference between w/ and w/o @plt suffix, the linker will pick
the right one to do, however it's late stage of GCC development, so just
tweak the testcase should be the best way to do now.

gcc/testsuite/ChangeLog:

        * g++.target/riscv/mv-symbols1.C: Tweak testcase.
        * g++.target/riscv/mv-symbols3.C: Likewise.
        * g++.target/riscv/mv-symbols4.C: Likewise.
        * g++.target/riscv/mv-symbols5.C: Likewise.
        * g++.target/riscv/mvc-symbols1.C: Likewise.
        * g++.target/riscv/mvc-symbols3.C: Likewise.
        * gcc.target/riscv/cm_mv_rv32.c: Likewise.
        * gcc.target/riscv/cpymem-64.c: Likewise.
        * gcc.target/riscv/fmax-snan.c: Likewise.
        * gcc.target/riscv/fmaxf-snan.c: Likewise.
        * gcc.target/riscv/fmin-snan.c: Likewise.
        * gcc.target/riscv/fminf-snan.c: Likewise.
        * gcc.target/riscv/large-model.c: Likewise.
        * gcc.target/riscv/predef-1.c: Likewise.
        * gcc.target/riscv/predef-4.c: Likewise.
        * gcc.target/riscv/predef-7.c: Likewise.
        * gcc.target/riscv/predef-9.c: Likewise.
        * gcc.target/riscv/rv32e_zcmp.c: Likewise.
        * gcc.target/riscv/rv32i_zcmp.c: Likewise.
        * gcc.target/riscv/zcmp_stack_alignment.c: Likewise.
---
 gcc/testsuite/g++.target/riscv/mv-symbols1.C          | 4 ++--
 gcc/testsuite/g++.target/riscv/mv-symbols3.C          | 4 ++--
 gcc/testsuite/g++.target/riscv/mv-symbols4.C          | 4 ++--
 gcc/testsuite/g++.target/riscv/mv-symbols5.C          | 4 ++--
 gcc/testsuite/g++.target/riscv/mvc-symbols1.C         | 4 ++--
 gcc/testsuite/g++.target/riscv/mvc-symbols3.C         | 4 ++--
 gcc/testsuite/gcc.target/riscv/cm_mv_rv32.c           | 4 ++--
 gcc/testsuite/gcc.target/riscv/cpymem-64.c            | 4 ++--
 gcc/testsuite/gcc.target/riscv/fmax-snan.c            | 2 +-
 gcc/testsuite/gcc.target/riscv/fmaxf-snan.c           | 2 +-
 gcc/testsuite/gcc.target/riscv/fmin-snan.c            | 2 +-
 gcc/testsuite/gcc.target/riscv/fminf-snan.c           | 2 +-
 gcc/testsuite/gcc.target/riscv/large-model.c          | 2 +-
 gcc/testsuite/gcc.target/riscv/predef-1.c             | 2 +-
 gcc/testsuite/gcc.target/riscv/predef-4.c             | 2 +-
 gcc/testsuite/gcc.target/riscv/predef-7.c             | 2 +-
 gcc/testsuite/gcc.target/riscv/predef-9.c             | 2 +-
 gcc/testsuite/gcc.target/riscv/rv32e_zcmp.c           | 6 +++---
 gcc/testsuite/gcc.target/riscv/rv32i_zcmp.c           | 6 +++---
 gcc/testsuite/gcc.target/riscv/zcmp_stack_alignment.c | 2 +-
 20 files changed, 32 insertions(+), 32 deletions(-)

diff --git a/gcc/testsuite/g++.target/riscv/mv-symbols1.C 
b/gcc/testsuite/g++.target/riscv/mv-symbols1.C
index ea1a536fd00..a0e3f1e8f6d 100644
--- a/gcc/testsuite/g++.target/riscv/mv-symbols1.C
+++ b/gcc/testsuite/g++.target/riscv/mv-symbols1.C
@@ -57,7 +57,7 @@ int bar(int x)
 /* { dg-final { scan-assembler-times "\n_Z3foov\.arch__v:\n" 1 } } */
 /* { dg-final { scan-assembler-times "\n_Z3foov\.arch__zba__zbb:\n" 1 } } */
 /* { dg-final { scan-assembler-times "\n_Z3foov\.resolver:\n" 1 } } */
-/* { dg-final { scan-assembler-times "\n\t\call\t_Z3foov\n" 1 } } */
+/* { dg-final { scan-assembler-times "\n\t\call\t_Z3foov(?:@plt)\n" 1 } } */
 /* { dg-final { scan-assembler-times "\n\t\.type\t_Z3foov, 
@gnu_indirect_function\n" 1 } } */
 /* { dg-final { scan-assembler-times "\n\t\.set\t_Z3foov,_Z3foov\.resolver\n" 
1 } } */
 
@@ -65,6 +65,6 @@ int bar(int x)
 /* { dg-final { scan-assembler-times "\n_Z3fooi\.arch__v:\n" 1 } } */
 /* { dg-final { scan-assembler-times "\n_Z3fooi\.arch__zba__zbb:\n" 1 } } */
 /* { dg-final { scan-assembler-times "\n_Z3fooi\.resolver:\n" 1 } } */
-/* { dg-final { scan-assembler-times "\n\t\call\t_Z3fooi\n" 1 } } */
+/* { dg-final { scan-assembler-times "\n\t\call\t_Z3fooi(?:@plt)\n" 1 } } */
 /* { dg-final { scan-assembler-times "\n\t\.type\t_Z3fooi, 
@gnu_indirect_function\n" 1 } } */
 /* { dg-final { scan-assembler-times "\n\t\.set\t_Z3fooi,_Z3fooi\.resolver\n" 
1 } } */
diff --git a/gcc/testsuite/g++.target/riscv/mv-symbols3.C 
b/gcc/testsuite/g++.target/riscv/mv-symbols3.C
index 4dc81cf7395..ca85b545210 100644
--- a/gcc/testsuite/g++.target/riscv/mv-symbols3.C
+++ b/gcc/testsuite/g++.target/riscv/mv-symbols3.C
@@ -37,7 +37,7 @@ int bar()
 /* { dg-final { scan-assembler-times "\n_Z3foov\.arch__v:\n" 0 } } */
 /* { dg-final { scan-assembler-times "\n_Z3foov\.arch__zba__zbb:\n" 0 } } */
 /* { dg-final { scan-assembler-times "\n_Z3foov\.resolver:\n" 1 } } */
-/* { dg-final { scan-assembler-times "\n\tcall\t_Z3foov\n" 1 } } */
+/* { dg-final { scan-assembler-times "\n\tcall\t_Z3foov(?:@plt)\n" 1 } } */
 /* { dg-final { scan-assembler-times "\n\t\.type\t_Z3foov, 
@gnu_indirect_function\n" 1 } } */
 /* { dg-final { scan-assembler-times "\n\t\.set\t_Z3foov,_Z3foov\.resolver\n" 
1 } } */
 
@@ -45,6 +45,6 @@ int bar()
 /* { dg-final { scan-assembler-times "\n_Z3fooi\.arch__v:\n" 0 } } */
 /* { dg-final { scan-assembler-times "\n_Z3fooi\.arch__zba__zbb:\n" 0 } } */
 /* { dg-final { scan-assembler-times "\n_Z3fooi\.resolver:\n" 0 } } */
-/* { dg-final { scan-assembler-times "\n\tcall\t_Z3fooi\n" 0 } } */
+/* { dg-final { scan-assembler-times "\n\tcall\t_Z3fooi(?:@plt)\n" 0 } } */
 /* { dg-final { scan-assembler-times "\n\t\.type\t_Z3fooi, 
@gnu_indirect_function\n" 0 } } */
 /* { dg-final { scan-assembler-times "\n\t\.set\t_Z3fooi,_Z3fooi\.resolver\n" 
0 } } */
diff --git a/gcc/testsuite/g++.target/riscv/mv-symbols4.C 
b/gcc/testsuite/g++.target/riscv/mv-symbols4.C
index b0ed16a5eda..938240d0e2d 100644
--- a/gcc/testsuite/g++.target/riscv/mv-symbols4.C
+++ b/gcc/testsuite/g++.target/riscv/mv-symbols4.C
@@ -43,7 +43,7 @@ int bar()
 /* { dg-final { scan-assembler-times "\n_Z3foov\.arch__v:\n" 0 } } */
 /* { dg-final { scan-assembler-times "\n_Z3foov\.arch__zba__zbb:\n" 0 } } */
 /* { dg-final { scan-assembler-times "\n_Z3foov\.resolver:\n" 1 } } */
-/* { dg-final { scan-assembler-times "\n\tcall\t_Z3foov\n" 1 } } */
+/* { dg-final { scan-assembler-times "\n\tcall\t_Z3foov(?:@plt)\n" 1 } } */
 /* { dg-final { scan-assembler-times "\n\t\.type\t_Z3foov, 
@gnu_indirect_function\n" 1 } } */
 /* { dg-final { scan-assembler-times "\n\t\.set\t_Z3foov,_Z3foov\.resolver\n" 
1 } } */
 
@@ -51,6 +51,6 @@ int bar()
 /* { dg-final { scan-assembler-times "\n_Z3fooi\.arch__v:\n" 0 } } */
 /* { dg-final { scan-assembler-times "\n_Z3fooi\.arch__zba__zbb:\n" 0 } } */
 /* { dg-final { scan-assembler-times "\n_Z3fooi\.resolver:\n" 0 } } */
-/* { dg-final { scan-assembler-times "\n\tcall\t_Z3fooi\n" 0 } } */
+/* { dg-final { scan-assembler-times "\n\tcall\t_Z3fooi(?:@plt)\n" 0 } } */
 /* { dg-final { scan-assembler-times "\n\t\.type\t_Z3fooi, 
@gnu_indirect_function\n" 0 } } */
 /* { dg-final { scan-assembler-times "\n\t\.set\t_Z3fooi,_Z3fooi\.resolver\n" 
0 } } */
diff --git a/gcc/testsuite/g++.target/riscv/mv-symbols5.C 
b/gcc/testsuite/g++.target/riscv/mv-symbols5.C
index f4c6b294e0f..ffb33703b99 100644
--- a/gcc/testsuite/g++.target/riscv/mv-symbols5.C
+++ b/gcc/testsuite/g++.target/riscv/mv-symbols5.C
@@ -49,7 +49,7 @@ int bar()
 /* { dg-final { scan-assembler-times "\n_Z3foov\.arch__v:\n" 1 } } */
 /* { dg-final { scan-assembler-times "\n_Z3foov\.arch__zba__zbb:\n" 1 } } */
 /* { dg-final { scan-assembler-times "\n_Z3foov\.resolver:\n" 1 } } */
-/* { dg-final { scan-assembler-times "\n\tcall\t_Z3foov\n" 1 } } */
+/* { dg-final { scan-assembler-times "\n\tcall\t_Z3foov(?:@plt)\n" 1 } } */
 /* { dg-final { scan-assembler-times "\n\t\.type\t_Z3foov, 
@gnu_indirect_function\n" 1 } } */
 /* { dg-final { scan-assembler-times "\n\t\.set\t_Z3foov,_Z3foov\.resolver\n" 
1 } } */
 
@@ -57,6 +57,6 @@ int bar()
 /* { dg-final { scan-assembler-times "\n_Z3fooi\.arch__v:\n" 1 } } */
 /* { dg-final { scan-assembler-times "\n_Z3fooi\.arch__zba__zbb:\n" 1 } } */
 /* { dg-final { scan-assembler-times "\n_Z3fooi\.resolver:\n" 0 } } */
-/* { dg-final { scan-assembler-times "\n\tcall\t_Z3fooi\n" 0 } } */
+/* { dg-final { scan-assembler-times "\n\tcall\t_Z3fooi(?:@plt)\n" 0 } } */
 /* { dg-final { scan-assembler-times "\n\t\.type\t_Z3fooi, 
@gnu_indirect_function\n" 0 } } */
 /* { dg-final { scan-assembler-times "\n\t\.set\t_Z3fooi,_Z3fooi\.resolver\n" 
0 } } */
diff --git a/gcc/testsuite/g++.target/riscv/mvc-symbols1.C 
b/gcc/testsuite/g++.target/riscv/mvc-symbols1.C
index c78bc7cb64a..3894e4d3274 100644
--- a/gcc/testsuite/g++.target/riscv/mvc-symbols1.C
+++ b/gcc/testsuite/g++.target/riscv/mvc-symbols1.C
@@ -36,7 +36,7 @@ int bar(int x)
 /* { dg-final { scan-assembler-times "\n_Z3foov\.arch__v:\n" 1 } } */
 /* { dg-final { scan-assembler-times "\n_Z3foov\.arch__zba__zbb:\n" 1 } } */
 /* { dg-final { scan-assembler-times "\n_Z3foov\.resolver:\n" 1 } } */
-/* { dg-final { scan-assembler-times "\n\tcall\t_Z3foov\n" 1 } } */
+/* { dg-final { scan-assembler-times "\n\tcall\t_Z3foov(?:@plt)\n" 1 } } */
 /* { dg-final { scan-assembler-times "\n\t\.type\t_Z3foov, 
@gnu_indirect_function\n" 1 } } */
 /* { dg-final { scan-assembler-times "\n\t\.set\t_Z3foov,_Z3foov\.resolver\n" 
1 } } */
 
@@ -44,6 +44,6 @@ int bar(int x)
 /* { dg-final { scan-assembler-times "\n_Z3fooi\.arch__v:\n" 1 } } */
 /* { dg-final { scan-assembler-times "\n_Z3fooi\.arch__zba__zbb:\n" 1 } } */
 /* { dg-final { scan-assembler-times "\n_Z3fooi\.resolver:\n" 1 } } */
-/* { dg-final { scan-assembler-times "\n\tcall\t_Z3fooi\n" 1 } } */
+/* { dg-final { scan-assembler-times "\n\tcall\t_Z3fooi(?:@plt)\n" 1 } } */
 /* { dg-final { scan-assembler-times "\n\t\.type\t_Z3fooi, 
@gnu_indirect_function\n" 1 } } */
 /* { dg-final { scan-assembler-times "\n\t\.set\t_Z3fooi,_Z3fooi\.resolver\n" 
1 } } */
diff --git a/gcc/testsuite/g++.target/riscv/mvc-symbols3.C 
b/gcc/testsuite/g++.target/riscv/mvc-symbols3.C
index b36c3fa7a95..4eace58f9f9 100644
--- a/gcc/testsuite/g++.target/riscv/mvc-symbols3.C
+++ b/gcc/testsuite/g++.target/riscv/mvc-symbols3.C
@@ -29,7 +29,7 @@ int bar(int x)
 /* { dg-final { scan-assembler-times "\n_Z3foov\.arch__v:\n" 0 } } */
 /* { dg-final { scan-assembler-times "\n_Z3foov\.arch__zba__zbb:\n" 0 } } */
 /* { dg-final { scan-assembler-times "\n_Z3foov\.resolver:\n" 1 } } */
-/* { dg-final { scan-assembler-times "\n\tcall\t_Z3foov\n" 1 } } */
+/* { dg-final { scan-assembler-times "\n\tcall\t_Z3foov(?:@plt)\n" 1 } } */
 /* { dg-final { scan-assembler-times "\n\t\.type\t_Z3foov, 
@gnu_indirect_function\n" 1 } } */
 /* { dg-final { scan-assembler-times "\n\t\.set\t_Z3foov,_Z3foov\.resolver\n" 
1 } } */
 
@@ -37,6 +37,6 @@ int bar(int x)
 /* { dg-final { scan-assembler-times "\n_Z3fooi\.arch__v:\n" 0 } } */
 /* { dg-final { scan-assembler-times "\n_Z3fooi\.arch__zba__zbb:\n" 0 } } */
 /* { dg-final { scan-assembler-times "\n_Z3fooi\.resolver:\n" 1 } } */
-/* { dg-final { scan-assembler-times "\n\tcall\t_Z3fooi\n" 1 } } */
+/* { dg-final { scan-assembler-times "\n\tcall\t_Z3fooi(?:@plt)\n" 1 } } */
 /* { dg-final { scan-assembler-times "\n\t\.type\t_Z3fooi, 
@gnu_indirect_function\n" 1 } } */
 /* { dg-final { scan-assembler-times "\n\t\.set\t_Z3fooi,_Z3fooi\.resolver\n" 
1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/cm_mv_rv32.c 
b/gcc/testsuite/gcc.target/riscv/cm_mv_rv32.c
index e2369fc4d2d..90d0d2c4803 100644
--- a/gcc/testsuite/gcc.target/riscv/cm_mv_rv32.c
+++ b/gcc/testsuite/gcc.target/riscv/cm_mv_rv32.c
@@ -10,10 +10,10 @@ func (int a, int b);
 **sum:
 **     ...
 **     cm.mvsa01       s1,s2
-**     call    func
+**     call    func(?:@plt)
 **     mv      s0,a0
 **     cm.mva01s       s1,s2
-**     call    func
+**     call    func(?:@plt)
 **     ...
 */
 int
diff --git a/gcc/testsuite/gcc.target/riscv/cpymem-64.c 
b/gcc/testsuite/gcc.target/riscv/cpymem-64.c
index 37b8ef0e020..4e2b22933af 100644
--- a/gcc/testsuite/gcc.target/riscv/cpymem-64.c
+++ b/gcc/testsuite/gcc.target/riscv/cpymem-64.c
@@ -95,7 +95,7 @@ COPY_ALIGNED_N(11)
 /*
 **copy_15:
 **    ...
-**    (call|tail)\tmemcpy
+**    (call|tail)\tmemcpy(?:@plt)
 **    ...
 */
 COPY_N(15)
@@ -116,7 +116,7 @@ COPY_ALIGNED_N(15)
 /*
 **copy_27:
 **    ...
-**    (call|tail)\tmemcpy
+**    (call|tail)\tmemcpy(?:@plt)
 **    ...
 */
 COPY_N(27)
diff --git a/gcc/testsuite/gcc.target/riscv/fmax-snan.c 
b/gcc/testsuite/gcc.target/riscv/fmax-snan.c
index aabaad5c973..ed52e385e83 100644
--- a/gcc/testsuite/gcc.target/riscv/fmax-snan.c
+++ b/gcc/testsuite/gcc.target/riscv/fmax-snan.c
@@ -10,4 +10,4 @@ fmax (double x, double y)
 
 /* { dg-final { scan-assembler-not "\tfmax\\.d\t" } } */
 /* { dg-final { scan-assembler-not "\tfge\\.d\t" } } */
-/* { dg-final { scan-assembler "\t(call|tail)\tfmax\t" } } */
+/* { dg-final { scan-assembler "\t(call|tail)\tfmax(?:@plt)\t" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/fmaxf-snan.c 
b/gcc/testsuite/gcc.target/riscv/fmaxf-snan.c
index f74a8171882..fa857bcda05 100644
--- a/gcc/testsuite/gcc.target/riscv/fmaxf-snan.c
+++ b/gcc/testsuite/gcc.target/riscv/fmaxf-snan.c
@@ -10,4 +10,4 @@ fmaxf (float x, float y)
 
 /* { dg-final { scan-assembler-not "\tfmax\\.s\t" } } */
 /* { dg-final { scan-assembler-not "\tfge\\.s\t" } } */
-/* { dg-final { scan-assembler "\t(call|tail)\tfmaxf\t" } } */
+/* { dg-final { scan-assembler "\t(call|tail)\tfmaxf(?:@plt)\t" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/fmin-snan.c 
b/gcc/testsuite/gcc.target/riscv/fmin-snan.c
index 3b2e8c3aa66..1bcfa5b1266 100644
--- a/gcc/testsuite/gcc.target/riscv/fmin-snan.c
+++ b/gcc/testsuite/gcc.target/riscv/fmin-snan.c
@@ -10,4 +10,4 @@ fmin (double x, double y)
 
 /* { dg-final { scan-assembler-not "\tfmin\\.d\t" } } */
 /* { dg-final { scan-assembler-not "\tfle\\.d\t" } } */
-/* { dg-final { scan-assembler "\t(call|tail)\tfmin\t" } } */
+/* { dg-final { scan-assembler "\t(call|tail)\tfmin(?:@plt)\t" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/fminf-snan.c 
b/gcc/testsuite/gcc.target/riscv/fminf-snan.c
index d28822e5eca..4c3984bc19b 100644
--- a/gcc/testsuite/gcc.target/riscv/fminf-snan.c
+++ b/gcc/testsuite/gcc.target/riscv/fminf-snan.c
@@ -10,4 +10,4 @@ fminf (float x, float y)
 
 /* { dg-final { scan-assembler-not "\tfmin\\.s\t" } } */
 /* { dg-final { scan-assembler-not "\tfle\\.s\t" } } */
-/* { dg-final { scan-assembler "\t(call|tail)\tfminf\t" } } */
+/* { dg-final { scan-assembler "\t(call|tail)\tfminf(?:@plt)\t" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/large-model.c 
b/gcc/testsuite/gcc.target/riscv/large-model.c
index 244d14e1878..d5ef7a0d0b9 100644
--- a/gcc/testsuite/gcc.target/riscv/large-model.c
+++ b/gcc/testsuite/gcc.target/riscv/large-model.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64 -fno-section-anchors -mcmodel=large" 
} */
+/* { dg-options "-march=rv64gc -mabi=lp64 -fno-section-anchors -mcmodel=large 
-fno-pie" } */
 /* { dg-skip-if "" { *-*-* } {"-O0"} } */
 int a, b;
 int foo1()
diff --git a/gcc/testsuite/gcc.target/riscv/predef-1.c 
b/gcc/testsuite/gcc.target/riscv/predef-1.c
index 250812a1040..551346e1fd3 100644
--- a/gcc/testsuite/gcc.target/riscv/predef-1.c
+++ b/gcc/testsuite/gcc.target/riscv/predef-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32i -mabi=ilp32 -mcmodel=medlow" } */
+/* { dg-options "-march=rv32i -mabi=ilp32 -mcmodel=medlow -fno-pie" } */
 
 int main () {
 #if !defined(__riscv)
diff --git a/gcc/testsuite/gcc.target/riscv/predef-4.c 
b/gcc/testsuite/gcc.target/riscv/predef-4.c
index ba8b5c785a9..7b3c05477d8 100644
--- a/gcc/testsuite/gcc.target/riscv/predef-4.c
+++ b/gcc/testsuite/gcc.target/riscv/predef-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64ia -mabi=lp64 -mcmodel=medlow" } */
+/* { dg-options "-march=rv64ia -mabi=lp64 -mcmodel=medlow -fno-pie" } */
 
 int main () {
 #if !defined(__riscv)
diff --git a/gcc/testsuite/gcc.target/riscv/predef-7.c 
b/gcc/testsuite/gcc.target/riscv/predef-7.c
index 833e2be887d..36caf8eb49d 100644
--- a/gcc/testsuite/gcc.target/riscv/predef-7.c
+++ b/gcc/testsuite/gcc.target/riscv/predef-7.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32em -mabi=ilp32e -mno-div -mcmodel=medlow" } */
+/* { dg-options "-march=rv32em -mabi=ilp32e -mno-div -mcmodel=medlow -fno-pie" 
} */
 
 int main () {
 #if !defined(__riscv)
diff --git a/gcc/testsuite/gcc.target/riscv/predef-9.c 
b/gcc/testsuite/gcc.target/riscv/predef-9.c
index b173d5df57f..fa072ad9b79 100644
--- a/gcc/testsuite/gcc.target/riscv/predef-9.c
+++ b/gcc/testsuite/gcc.target/riscv/predef-9.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64em -mabi=lp64e -mno-div -mcmodel=medlow" } */
+/* { dg-options "-march=rv64em -mabi=lp64e -mno-div -mcmodel=medlow -fno-pie" 
} */
 /* { dg-warning "LP64E ABI is marked for deprecation in GCC" "" { target *-*-* 
} 0 } */
 /* { dg-note "if you need LP64E please notify the GCC project via PR116152" "" 
{ target *-*-* } 0 } */
 
diff --git a/gcc/testsuite/gcc.target/riscv/rv32e_zcmp.c 
b/gcc/testsuite/gcc.target/riscv/rv32e_zcmp.c
index 0af4d7199f6..7d0a0987ff0 100644
--- a/gcc/testsuite/gcc.target/riscv/rv32e_zcmp.c
+++ b/gcc/testsuite/gcc.target/riscv/rv32e_zcmp.c
@@ -244,9 +244,9 @@ test_f0 ()
 /*
 **foo:
 **     cm.push {ra}, -16
-**     call    f1
+**     call    f1(?:@plt)
 **     cm.pop  {ra}, 16
-**     tail    f2
+**     tail    f2(?:@plt)
 */
 void
 foo (void)
@@ -258,7 +258,7 @@ foo (void)
 /*
 **test_popretz:
 **     cm.push {ra}, -16
-**     call    f1
+**     call    f1(?:@plt)
 **     li      a0,0
 **     cm.popret       {ra}, 16
 */
diff --git a/gcc/testsuite/gcc.target/riscv/rv32i_zcmp.c 
b/gcc/testsuite/gcc.target/riscv/rv32i_zcmp.c
index 723889f49df..641891901c1 100644
--- a/gcc/testsuite/gcc.target/riscv/rv32i_zcmp.c
+++ b/gcc/testsuite/gcc.target/riscv/rv32i_zcmp.c
@@ -244,9 +244,9 @@ test_f0 ()
 /*
 **foo:
 **     cm.push {ra}, -16
-**     call    f1
+**     call    f1(?:@plt)
 **     cm.pop  {ra}, 16
-**     tail    f2
+**     tail    f2(?:@plt)
 */
 void
 foo (void)
@@ -258,7 +258,7 @@ foo (void)
 /*
 **test_popretz:
 **     cm.push {ra}, -16
-**     call    f1
+**     call    f1(?:@plt)
 **     li      a0,0
 **     cm.popret       {ra}, 16
 */
diff --git a/gcc/testsuite/gcc.target/riscv/zcmp_stack_alignment.c 
b/gcc/testsuite/gcc.target/riscv/zcmp_stack_alignment.c
index f7d8f446b79..ee4bd422c3f 100644
--- a/gcc/testsuite/gcc.target/riscv/zcmp_stack_alignment.c
+++ b/gcc/testsuite/gcc.target/riscv/zcmp_stack_alignment.c
@@ -10,7 +10,7 @@ bar ();
 **fool_rv32e:
 **     cm.push {ra}, -32
 **     ...
-**     call    bar
+**     call    bar(?:@plt)
 **     ...
 **     lw      a[0-5],32\(sp\)
 **     ...
-- 
2.34.1

[PATCH] RISC-V: Tweak testcase for PIE

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