Hi all, While tinkering with AArch64's SVE port, I noticed (by means of ICE) that vetorizable_induction does not accurately test target support of the vectorized operations it emits.
This would only give an ICE for variable-length vectors (see https://gcc.gnu.org/bugzilla/show_bug.cgi?id=103523), so the patch I've attached here covers those only. The question I'd like to raise is whether we should apply more scrutiny here; a vectorized MULT_EXPR is emitted to calculate the step vector for each IV in SLP induction vectorization, as well as whenever we need to calucalate the initial values of float inductions with variable-length vectors. Is it worth moving some code around to test for support of MULT_EXPR with the mode of STEP_VECTYPE whenver we know that the transformation will use it? Is there a reason that testing for target support was omitted from the originial code? While this is an RFC, the patch itself has been bootstrapped and regtested on aarch64-linux-gnu. Thank you very much for any discussion. Spencer Abson Spencer Abson (1): Induction vectorizer: prevent ICE for scalable types gcc/tree-vect-loop.cc | 39 ++++++++++++++++++++++++++++++--------- 1 file changed, 30 insertions(+), 9 deletions(-) -- 2.34.1
