On Tue, Jul 31, 2012 at 1:33 PM, Michael Zolotukhin
<michael.v.zolotuk...@gmail.com> wrote:
> Hi guys,
> Here is a third part of patch, refactored by Kirill. This one adds
> _addcarryx_u[32|64] intrinsics.
>
> Is it ok?
>
> Changelog entry:
> 2012-07-31 Michael Zolotukhin <michael.v.zolotuk...@intel.com>
>
> * common/config/i386/i386-common.c (OPTION_MASK_ISA_ADX_SET): New.
> (OPTION_MASK_ISA_ADX_UNSET): Likewise.
> (ix86_handle_option): Handle madx option.
> * config.gcc (i[34567]86-*-*): Add adxintrin.h.
> (x86_64-*-*): Likewise.
> * config/i386/adxintrin.h: New header.
> * config/i386/driver-i386.c (host_detect_local_cpu): Detect ADCX/ADOX
> support.
> * config/i386/i386-builtin-types.def
> (UCHAR_FTYPE_UCHAR_UINT_UINT_PINT): New function type.
> (UCHAR_FTYPE_UCHAR_ULONGLONG_ULONGLONG_PINT): Likewise.
> * config/i386/i386-c.c: Define __ADX__ if needed.
> * config/i386/i386.c (ix86_target_string): Define -madx option.
> (PTA_ADX): New.
> (ix86_option_override_internal): Handle new option.
> (ix86_valid_target_attribute_inner_p): Add OPT_madx.
> (ix86_builtins): Add IX86_BUILTIN_ADDCARRYX32,
> IX86_BUILTIN_ADDCARRYX64.
> (ix86_init_mmx_sse_builtins): Define corresponding built-ins.
> (ix86_expand_builtin): Handle these built-ins.
> (ix86_expand_args_builtin): Handle new function types.
> * config/i386/i386.h (TARGET_ADX): New.
> * config/i386/i386.md (adcx<mode>): New define_expand.
> (adcx<mode>_carry): New define_insn.
> * config/i386/i386.opt (madx): New.
> * config/i386/x86intrin.h: Include adxintrin.h.
>
> testsuite/Changelog entry:
> 2012-07-31 Michael Zolotukhin <michael.v.zolotuk...@intel.com>
>
> * gcc.target/i386/adx-addcarryx32-1.c: New.
> * gcc.target/i386/adx-addcarryx32-2.c: New.
> * gcc.target/i386/adx-addcarryx64-1.c: New.
> * gcc.target/i386/adx-addcarryx64-2.c: New.
> * gcc.target/i386/adx-check.h: New.
> * gcc.target/i386/i386.exp (check_effective_target_adx): New.
> * gcc.target/i386/sse-12.c: Add -madx.
> * gcc.target/i386/sse-13.c: Ditto.
> * gcc.target/i386/sse-14.c: Ditto.
> * gcc.target/i386/sse-22.c: Ditto.
> * gcc.target/i386/sse-23.c: Ditto.
> * g++.dg/other/i386-2.C: Ditto.
> * g++.dg/other/i386-3.C: Ditto.
>
>
> Bootstrap and new tests are passing, other testing is in progress.
Following is the correct definition of new insn:
--cut here--
Index: i386.md
===================================================================
--- i386.md (revision 190005)
+++ i386.md (working copy)
@@ -6604,6 +6604,27 @@
(set_attr "pent_pair" "pu")
(set_attr "mode" "<MODE>")])
+(define_insn "adcx<mode>3"
+ [(set (reg:CCC FLAGS_REG)
+ (compare
+ (plus:SWI48
+ (match_operand:SWI48 1 "nonimmediate_operand" "%0")
+ (plus:SWI48
+ (match_operator 4 "ix86_carry_flag_operator"
+ [(match_operand 3 "flags_reg_operand") (const_int 0)])
+ (match_operand:SWI48 2 "nonimmediate_operand" "rm")))
+ (const_int 0)))
+ (set (match_operand:SWI48 0 "register_operand" "=r")
+ (plus:SWI48 (match_dup 1)
+ (plus:SWI48 (match_op_dup 4
+ [(match_dup 3) (const_int 0)])
+ (match_dup 2))))]
+ "TARGET_ADX && ix86_binary_operator_ok (PLUS, <MODE>mode, operands)"
+ "adcx\t{%2, %0|%0, %2}"
+ [(set_attr "type" "alu")
+ (set_attr "use_carry" "1")
+ (set_attr "mode" "<MODE>")])
+
(define_insn "*addsi3_carry_zext"
[(set (match_operand:DI 0 "register_operand" "=r")
(zero_extend:DI
--cut here--
You don't need expander to emit insns via emit_insn (gen_<whatever>).
Please put the code from the expander back to i386.c and rewrite the
sequence according to new insn pattern.
+ /* Generate CF from input operand. */
+ emit_insn (gen_addqi3_cc (gen_reg_rtx (QImode), operands[2], constm1_rtx));
This insn should be in correct mode, you can make the pattern public if needed.
+ if (!REG_P (op1))
+ op1 = copy_to_mode_reg (QImode, op1);
+ else
+ op1 = gen_rtx_SUBREG (QImode, op1, 0);
This is not needed, just pass the register in the correct mode. You
should use something like:
if (!insn_data[icode].operand[2].predicate (op1, mode1))
op1 = copy_to_mode_reg (mode1, op1);
Uros.
