RDI, RSI, RDX and RCX registers are used to pass arguments in 64-bit
mode.  EAX, EDX and ECX registers are used to pass arguments in 32-bit
mode.  Add tests to verify that argument registers are spilled properly.

        PR target/119171
        * gcc.target/i386/pr119171-1.c: New test.
        * gcc.target/i386/pr119171-2.c: Likewise.

Signed-off-by: H.J. Lu <hjl.to...@gmail.com>
---
 gcc/testsuite/gcc.target/i386/pr119171-1.c | 14 ++++++++++++++
 gcc/testsuite/gcc.target/i386/pr119171-2.c | 14 ++++++++++++++
 2 files changed, 28 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/i386/pr119171-1.c
 create mode 100644 gcc/testsuite/gcc.target/i386/pr119171-2.c

diff --git a/gcc/testsuite/gcc.target/i386/pr119171-1.c 
b/gcc/testsuite/gcc.target/i386/pr119171-1.c
new file mode 100644
index 00000000000..a017e6e215f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr119171-1.c
@@ -0,0 +1,14 @@
+/* { dg-do compile { target { ! ia32 } } } */
+/* { dg-options "-O2" } */
+
+extern long a1, a2, a3, a4;
+extern void foo (void *, void *, void *, void *);
+void
+bar (void *rdi, void *rsi, void *rdx, void *rcx)
+{
+  asm ("" : "=D"(a1) : "D"(0));
+  asm ("" : "=S"(a2) : "S"(0));
+  asm ("" : "=d"(a3) : "d"(0));
+  asm ("" : "=c"(a4) : "c"(0));
+  foo (rdi, rsi, rdx, rcx);
+}
diff --git a/gcc/testsuite/gcc.target/i386/pr119171-2.c 
b/gcc/testsuite/gcc.target/i386/pr119171-2.c
new file mode 100644
index 00000000000..83b705b27c3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr119171-2.c
@@ -0,0 +1,14 @@
+/* { dg-do compile { target ia32 } } */
+/* { dg-options "-O2" } */
+
+extern long a1, a2, a3;
+extern void foo (void *, void *, void *) __attribute__ ((regparm (3)));
+__attribute__ ((regparm (3)))
+void
+bar (void *eax, void *edx, void *ecx)
+{
+  asm ("" : "=a"(a1) : "a"(0));
+  asm ("" : "=d"(a2) : "d"(0));
+  asm ("" : "=c"(a3) : "c"(0));
+  foo (eax, edx, ecx);
+}
-- 
2.48.1

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