[PATCH] RISC-V: Add missing mode in bsetclr_zero_extract pattern

[Liao Shihua]

The following warning was encountered while building GCC, fix it:
../.././gcc/gcc/config/riscv/bitmanip.md:809:1: warning: source missing a mode?
../.././gcc/gcc/config/riscv/bitmanip.md:809:1: warning: source missing a mode?

gcc/ChangeLog:

        * config/riscv/bitmanip.md (*bsetclr_zero_extract):
        (*bsetclr_zero_extract<mode>): Add missing mode in pattern.

---
 gcc/config/riscv/bitmanip.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/config/riscv/bitmanip.md b/gcc/config/riscv/bitmanip.md
index 684e5d2ae8b6..1cc539a1729e 100644
--- a/gcc/config/riscv/bitmanip.md
+++ b/gcc/config/riscv/bitmanip.md
@@ -806,7 +806,7 @@
                (match_dup 3)))])
 
 ;; Yet another form of a bset/bclr that can be created by combine.
-(define_insn "*bsetclr_zero_extract"
+(define_insn "*bsetclr_zero_extract<mode>"
   [(set (zero_extract:X (match_operand:X 0 "register_operand" "+r")
                        (const_int 1)
                        (zero_extend:X
-- 
2.43.0