On Tue, 2025-01-21 at 11:46 +0800, Lulu Cheng wrote: > > 在 2025/1/18 下午7:33, Xi Ruoyao 写道: > /* snip */ > > ;; This code iterator allows unsigned and signed division to be generated > > ;; from the same template. > > @@ -3083,39 +3084,6 @@ (define_expand "rotl<mode>3" > > } > > }); > > > > -;; The following templates were added to generate "bstrpick.d + alsl.d" > > -;; instruction pairs. > > -;; It is required that the values of const_immalsl_operand and > > -;; immediate_operand must have the following correspondence: > > -;; > > -;; (immediate_operand >> const_immalsl_operand) == 0xffffffff > > - > > -(define_insn "zero_extend_ashift" > > - [(set (match_operand:DI 0 "register_operand" "=r") > > - (and:DI (ashift:DI (match_operand:DI 1 "register_operand" "r") > > - (match_operand 2 "const_immalsl_operand" "")) > > - (match_operand 3 "immediate_operand" "")))] > > - "TARGET_64BIT > > - && ((INTVAL (operands[3]) >> INTVAL (operands[2])) == 0xffffffff)" > > - "bstrpick.d\t%0,%1,31,0\n\talsl.d\t%0,%0,$r0,%2" > > - [(set_attr "type" "arith") > > - (set_attr "mode" "DI") > > - (set_attr "insn_count" "2")]) > > - > > -(define_insn "bstrpick_alsl_paired" > > - [(set (match_operand:DI 0 "register_operand" "=&r") > > - (plus:DI > > - (and:DI (ashift:DI (match_operand:DI 1 "register_operand" "r") > > - (match_operand 2 "const_immalsl_operand" "")) > > - (match_operand 3 "immediate_operand" "")) > > - (match_operand:DI 4 "register_operand" "r")))] > > - "TARGET_64BIT > > - && ((INTVAL (operands[3]) >> INTVAL (operands[2])) == 0xffffffff)" > > - "bstrpick.d\t%0,%1,31,0\n\talsl.d\t%0,%0,%4,%2" > > - [(set_attr "type" "arith") > > - (set_attr "mode" "DI") > > - (set_attr "insn_count" "2")]) > > - > > Hi, > > In LoongArch, the microarchitecture has performed instruction fusion on > bstrpick.d+alsl.d. > > This modification may cause the two instructions to not be close together. > > So I think these two templates cannot be deleted. I will test the impact > of this patch on the spec today.
Oops. I guess we can salvage it with TARGET_SCHED_MACRO_FUSION_P and TARGET_SCHED_MACRO_FUSION_PAIR_P. And I'd like to know more details: 1. Is the fusion applying to all bstrpick.d + alsl.d, or only bstrpick.d rd, rs, 31, 0? 2. Is the fusion also applying to bstrpick.d + slli.d, or we really have to write the strange "alsl.d rd, rs, r0, shamt" instruction? -- Xi Ruoyao <xry...@xry111.site> School of Aerospace Science and Technology, Xidian University
