On 1/13/25 2:07 AM, Jin Ma wrote:
Correct logic on 64-bit host:
         ...
         bseti   a5,zero,38
         bseti   a5,a5,63
         addi    a5,a5,-1
         and     a4,a4,a5
        ...

Wrong logic on 32-bit host:
        ...
         li      a5,64
         bseti   a5,a5,31
         addi    a5,a5,-1
         and     a4,a4,a5
        ...

gcc/ChangeLog:

        * config/riscv/riscv.cc (riscv_build_integer_1): Change
        1UL/1ULL to HOST_WIDE_INT_1U.

gcc/testsuite/ChangeLog:

        * gcc.target/riscv/zbs-bug.c: New test.
Egad.  Definitely my bad.  Thanks for debugging & fixing this.

I've pushed it to the trunk.

Jeff


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