On 1/13/25 15:05, Torbjorn SVENSSON wrote:
Hi Richard and Robin,

It looks like this patch introduced a regression with MVE (Cortex-M55 and Cortex-M85).
If I try to build testsuite/c-c++-common/vector-compare-3.c (there are 
other test cases that fail with a similar ICE):
arm-none-eabi-gcc /src/gcc/testsuite/c-c++-common/vector-compare-3.c 
-march=armv8.1-m.main+mve+fp.dp -mfloat-abi=hard -mfpu=auto -Wc++-compat 
-O2 -S -o /dev/null
/src/gcc/testsuite/c-c++-common/vector-compare-3.c: In function 'g':
/src/gcc/testsuite/c-c++-common/vector-compare-3.c:24:1: error: unrecognizable insn:
(insn 26 25 27 2 (set (reg:V4SI 137)
         (unspec:V4SI [
                 (reg:V4SI 144)
                 (reg:V4SI 145)
                 (subreg:V4BI (reg:HI 143) 0)
            ] VPSELQ_S)) "/src/gcc/testsuite/c-c++-common/vector-compare-3.c":23:6 -1
      (nil))
during RTL pass: vregs
/src/gcc/testsuite/c-c++-common/vector-compare-3.c:24:1: internal compiler error: in extract_insn, at recog.cc:2882 0x20d7ca8 diagnostic_context::diagnostic_impl(rich_location*, diagnostic_metadata const*, diagnostic_option_id, char const*, __va_list_tag (*) [1], diagnostic_t)
         ???:0
0x20eddd2 internal_error(char const*, ...)
         ???:0
0x726ee5 fancy_abort(char const*, int, char const*)
         ???:0
0x7166bf _fatal_insn(char const*, rtx_def const*, char const*, int, char const*)
         ???:0
0x7166de _fatal_insn_not_found(rtx_def const*, char const*, int, char const*)
         ???:0
0xe952f7 extract_insn(rtx_insn*)
         ???:0
Please submit a full bug report, with preprocessed source (by using -freport-bug).
Please include the complete backtrace with any bug report.
See <https://gcc.gnu.org/bugs/> for instructions.


Above is with r15-6752-g08b6e875c6b.

Please take a look and see if this can easily be fixed.
I think this is https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115439

I'll have a look.

Thanks,

Christophe


Kind regards,
Torbjörn


On 2024-05-13 16:14, Robin Dapp wrote:
What happens if we simply remove all of the force_reg here?
On x86 I bootstrapped and tested the attached without fallout
(gcc188, so it's no avx512-native machine and therefore limited
coverage).  riscv regtest is unchanged.
For aarch64 I would to rely on the pre-commit CI to pick it
up (does that work on sub-threads?).

Regards
  Robin


gcc/ChangeLog:

    PR middle-end/113474

    * internal-fn.cc (expand_vec_cond_mask_optab_fn):  Remove
    force_regs.

gcc/testsuite/ChangeLog:

    * gcc.target/riscv/rvv/autovec/pr113474.c: New test.
---
  gcc/internal-fn.cc                                  |  3 ---
  .../gcc.target/riscv/rvv/autovec/pr113474.c         | 13 +++++++++++++
  2 files changed, 13 insertions(+), 3 deletions(-)
  create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/pr113474.c
diff --git a/gcc/internal-fn.cc b/gcc/internal-fn.cc
index 2c764441cde..4d226c478b4 100644
--- a/gcc/internal-fn.cc
+++ b/gcc/internal-fn.cc
@@ -3163,9 +3163,6 @@ expand_vec_cond_mask_optab_fn (internal_fn, gcall *stmt, convert_optab optab)
    rtx_op1 = expand_normal (op1);
    rtx_op2 = expand_normal (op2);
-  mask = force_reg (mask_mode, mask);
-  rtx_op1 = force_reg (mode, rtx_op1);
-
    rtx target = expand_expr (lhs, NULL_RTX, VOIDmode, EXPAND_WRITE);
    create_output_operand (&ops[0], target, mode);
    create_input_operand (&ops[1], rtx_op1, mode);
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr113474.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr113474.c
new file mode 100644
index 00000000000..0364bf9f5e3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr113474.c
@@ -0,0 +1,13 @@
+/* { dg-do compile { target riscv_v } }  */
+/* { dg-additional-options "-std=c99" }  */
+
+void
+foo (int n, int **a)
+{
+  int b;
+  for (b = 0; b < n; b++)
+    for (long e = 8; e > 0; e--)
+      a[b][e] = a[b][e] == 15;
+}
+
+/* { dg-final { scan-assembler "vmerge.vim" } }  */

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