On Tue, Jan 07, 2025 at 06:17:02PM +0000, Richard Sandiford wrote:
> Andrew Carlotti <andrew.carlo...@arm.com> writes:
> > I forgot to include this in the earlier patch; is this ok for master (once
> > the
> > pass is merged, of course)?
> >
> > gcc/ChangeLog:
> >
> > * doc/passes.texi: Document hardreg PRE pass.
> >
> >
> > diff --git a/gcc/doc/passes.texi b/gcc/doc/passes.texi
> > index
> > 639f6b325c8be47bffd64269340c4dd8ea0f321c..5c2a174a7495404de48002f54902cce846e62b53
> > 100644
> > --- a/gcc/doc/passes.texi
> > +++ b/gcc/doc/passes.texi
> > @@ -959,6 +959,11 @@ global constant and copy propagation.
> > The source file for this pass is @file{gcse.cc}, and the LCM routines
> > are in @file{lcm.cc}.
> >
> > +A third version of this pass is run on some targets to optimise
> > assignments to
> > +specific hard registers. This can be used in cases where a register has a
> > +single purpose, such as specifying a mode as an extra input for specific
> > +instructions (when these modes cannot be handled in the mode switching
> > pass).
>
> LGTM, but how about adding ", @pxref{Mode switching optimization}" after
> "mode switching pass"? (Untested.)
>
> OK with that change, or without if it doesn't work.
I've committed the below patch, after inspecting the info, dvi and html output.
>
> Thanks,
> Richard
>
> > +
> > @item Loop optimization
> >
> > This pass performs several loop related optimizations.
--------
docs: Document new hardreg PRE pass.
gcc/ChangeLog:
* doc/passes.texi: Document hardreg PRE pass.
diff --git a/gcc/doc/passes.texi b/gcc/doc/passes.texi
index
59a143292c78813db21ac3a7c05bca8bf5640e2d..282fc1a6a12b4f514dc7a629e8104f5374b18551
100644
--- a/gcc/doc/passes.texi
+++ b/gcc/doc/passes.texi
@@ -959,6 +959,12 @@ global constant and copy propagation.
The source file for this pass is @file{gcse.cc}, and the LCM routines
are in @file{lcm.cc}.
+A third version of this pass is run on some targets to optimise assignments to
+specific hard registers. This can be used in cases where a register has a
+single purpose, such as specifying a mode as an extra input for specific
+instructions (@pxref{mode switching optimization} for another way of handling
+instruction modes).
+
@item Loop optimization
This pass performs several loop related optimizations.
@@ -1018,6 +1024,7 @@ combination approaches as well.
The pass runs twice, once before register allocation and once after
register allocation. The code is located in @file{late-combine.cc}.
+@anchor{mode switching optimization}
@item Mode switching optimization
This pass looks for instructions that require the processor to be in a
