> On 10 Jan 2025, at 00:07, Tamar Christina <tamar.christ...@arm.com> wrote:
>
> Hi All,
>
> The Parts Num field for the MIDR for Cortex-X4 is wrong. It's currently the
> parts number for a Cortex-A720 (which does have the right number).
>
> The correct number can be found in the Cortex-X4 Technical Reference Manual
> [1]
> on page 382 in Issue Number 5.
>
> [1] https://developer.arm.com/documentation/102484/latest/
>
> Bootstrapped Regtested on aarch64-none-linux-gnu and no issues.
>
> Ok for master? and backport to GCC-14?
>
Ok. I’ve checked that the TRM indeed says 0xd82.
Thanks,
Kyrill
> Thanks,
> Tamar
>
> gcc/ChangeLog:
>
> * config/aarch64/aarch64-cores.def (AARCH64_CORE): Fix cortex-x4 parts
> num.
>
> ---
> diff --git a/gcc/config/aarch64/aarch64-cores.def
> b/gcc/config/aarch64/aarch64-cores.def
> index
> caf61437d1805254b7453e74ea27d2ca8f55d32b..5ac81332b67c9612acf9dde144aee5b0db8d9f7a
> 100644
> --- a/gcc/config/aarch64/aarch64-cores.def
> +++ b/gcc/config/aarch64/aarch64-cores.def
> @@ -193,7 +193,7 @@ AARCH64_CORE("cortex-x2", cortexx2, cortexa57, V9A,
> (SVE2_BITPERM, MEMTAG, I8M
>
> AARCH64_CORE("cortex-x3", cortexx3, cortexa57, V9A, (SVE2_BITPERM, MEMTAG,
> I8MM, BF16), neoversev2, 0x41, 0xd4e, -1)
>
> -AARCH64_CORE("cortex-x4", cortexx4, cortexa57, V9_2A, (SVE2_BITPERM,
> MEMTAG, PROFILE), neoversev3, 0x41, 0xd81, -1)
> +AARCH64_CORE("cortex-x4", cortexx4, cortexa57, V9_2A, (SVE2_BITPERM,
> MEMTAG, PROFILE), neoversev3, 0x41, 0xd82, -1)
> AARCH64_CORE("cortex-x925", cortexx925, cortexa57, V9_2A, (SVE2_BITPERM,
> MEMTAG, PROFILE), cortexx925, 0x41, 0xd85, -1)
>
> AARCH64_CORE("neoverse-n2", neoversen2, cortexa57, V9A, (I8MM, BF16,
> SVE2_BITPERM, RNG, MEMTAG, PROFILE), neoversen2, 0x41, 0xd49, -1)
>
>
>
>
> --
> <rb19140.patch>
