Re: [PATCH] testsuite: arm: Verify asm per function for armv8_2-fp16-conv-1.c

[Torbjorn SVENSSON]

On 2025-01-09 12:56, Richard Earnshaw (lists) wrote:

On 27/12/2024 17:01, Torbjörn SVENSSON wrote:

Ok for trunk?

--

This change will enforce that the expected instructions are generated
per function rather than allowing some other function to use the
expected instructions.

gcc/testsuite/ChangeLog:

        * gcc.target/arm/armv8_2-fp16-conv-1.c: Convert
        scan-assembler-times to check-function-bodies.

Signed-off-by: Torbjörn SVENSSON <torbjorn.svens...@foss.st.com>

I'd recommend that you also add "-fno-schedule-insns -fno-schedule-insns2" to 
dg-options to avoid the risk of the scheduler moving code around and breaking the 
sequences.

OK with that change.

Pushed as r15-6745-g794f6721e0e (and the typo fix in r15-6749-g424a9ac45ab).

Note: This commit may cause a "regression" as these 2 fails:

FAIL: gcc.target/arm/armv8_2-fp16-conv-1.c scan-assembler-times 
vcvt\\.s32\\.f64\\ts[0-9]+, d[0-9]+ 1
FAIL: gcc.target/arm/armv8_2-fp16-conv-1.c scan-assembler-times 
vcvt\\.s32\\.f64\\ts[0-9]+, d[0-9]+ 1

are replaced with

FAIL: gcc.target/arm/armv8_2-fp16-conv-1.c check-function-bodies f64_to_s16
FAIL: gcc.target/arm/armv8_2-fp16-conv-1.c check-function-bodies f64_to_u16

when testing using march=armv8-m.main+dsp+fp/float-abi=hard/fpu=fpv5-sp-d16. 
The reason for the failures are that __aeabi_d2iz and __aeabi_d2uiz are used.

Note 2: There was no check for what f64_to_u16 would generate before my 2 
changes and that was overlooked when I did this patch. Sorry!


Kind regards,
Torbjörn

R.

---
  .../gcc.target/arm/armv8_2-fp16-conv-1.c      | 99 ++++++++++++++++---
  1 file changed, 83 insertions(+), 16 deletions(-)

diff --git a/gcc/testsuite/gcc.target/arm/armv8_2-fp16-conv-1.c 
b/gcc/testsuite/gcc.target/arm/armv8_2-fp16-conv-1.c
index c9639a542ae..279aafbc7b4 100644
--- a/gcc/testsuite/gcc.target/arm/armv8_2-fp16-conv-1.c
+++ b/gcc/testsuite/gcc.target/arm/armv8_2-fp16-conv-1.c
@@ -2,100 +2,167 @@
  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_ok }  */
  /* { dg-options "-O2" }  */
  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
+/* { dg-final { check-function-bodies "**" "" } } */

/* Test ARMv8.2 FP16 conversions. */

  #include <arm_fp16.h>

+/*

+** f16_to_f32:
+** ...
+**     vcvtb\.f32\.f16 (s[0-9]+), \1
+** ...
+*/
  float
  f16_to_f32 (__fp16 a)
  {
    return (float)a;
  }

+/*

+** f16_to_pf32:
+** ...
+**     vcvtb\.f32\.f16 (s[0-9]+), \1
+** ...
+*/
  float
  f16_to_pf32 (__fp16* a)
  {
    return (float)*a;
  }

+/*

+** f16_to_s16:
+** ...
+**     vcvtb\.f32\.f16 (s[0-9]+), \1
+**     vcvt\.s32\.f32  \1, \1
+** ...
+*/
  short
  f16_to_s16 (__fp16 a)
  {
    return (short)a;
  }

+/*

+** pf16_to_s16:
+** ...
+**     vcvtb\.f32\.f16 (s[0-9]+), \1
+**     vcvt\.s32\.f32  \1, \1
+** ...
+*/
  short
  pf16_to_s16 (__fp16* a)
  {
    return (short)*a;
  }

-/* { dg-final { scan-assembler-times {vcvtb\.f32\.f16\ts[0-9]+, s[0-9]+} 4 } } */

-
+/*
+** f32_to_f16:
+** ...
+**     vcvtb\.f16\.f32 (s[0-9]+), \1
+** ...
+*/
  __fp16
  f32_to_f16 (float a)
  {
    return (__fp16)a;
  }

+/*

+** f32_to_pf16:
+** ...
+**     vcvtb\.f16\.f32 (s[0-9]+), \1
+** ...
+*/
  void
  f32_to_pf16 (__fp16* x, float a)
  {
    *x = (__fp16)a;
  }

+/*

+** s16_to_f16:
+** ...
+**     vcvt\.f32\.s32  (s[0-9]+), \1
+**     vcvtb\.f16\.f32 \1, \1
+** ...
+*/
  __fp16
  s16_to_f16 (short a)
  {
    return (__fp16)a;
  }

+/*

+** s16_to_pf16:
+** ...
+**     vcvt\.f32\.s32  (s[0-9]+), \1
+**     vcvtb\.f16\.f32 \1, \1
+** ...
+*/
  void
  s16_to_pf16 (__fp16* x, short a)
  {
    *x = (__fp16)a;
  }

-/* { dg-final { scan-assembler-times {vcvtb\.f16\.f32\ts[0-9]+, s[0-9]+} 4 } } */

-
+/*
+** s16_to_f32:
+** ...
+**     vcvt\.f32\.s32  (s[0-9]+), \1
+** ...
+*/
  float
  s16_to_f32 (short a)
  {
    return (float)a;
  }

-/* { dg-final { scan-assembler-times {vcvt\.f32\.s32\ts[0-9]+, s[0-9]+} 3 } } */

-
+/*
+** f32_to_s16:
+** ...
+**     vcvt\.s32\.f32  (s[0-9]+), \1
+** ...
+*/
  short
  f32_to_s16 (float a)
  {
    return (short)a;
  }

-/* { dg-final { scan-assembler-times {vcvt\.s32\.f32\ts[0-9]+, s[0-9]+} 3 } } */

-
+/*
+** f32_to_u16:
+** ...
+**     vcvt\.u32\.f32  (s[0-9]+), \1
+** ...
+*/
  unsigned short
  f32_to_u16 (float a)
  {
    return (unsigned short)a;
  }

-/* { dg-final { scan-assembler-times {vcvt\.u32\.f32\ts[0-9]+, s[0-9]+} 1 } } */

-
+/*
+** f64_to_s16:
+** ...
+**     vcvt\.s32\.f64  s[0-9]+, d[0-9]+
+** ...
+*/
  short
  f64_to_s16 (double a)
  {
    return (short)a;
  }

-/* { dg-final { scan-assembler-times {vcvt\.s32\.f64\ts[0-9]+, d[0-9]+} 1 } } */

-
+/*
+** f64_to_s16:
+** ...
+**     vcvt\.s32\.f64  s[0-9]+, d[0-9]+
+** ...
+*/
  unsigned short
  f64_to_u16 (double a)
  {
    return (unsigned short)a;
  }
-
-/* { dg-final { scan-assembler-times {vcvt\.s32\.f64\ts[0-9]+, d[0-9]+} 1 } }  
*/
-
-